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[117.20.68.98]) by smtp.gmail.com with UTF8SMTPSA id j10-20020a17090a734a00b001bf31f7520csm941202pjs.1.2022.04.23.06.14.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 23 Apr 2022 06:14:46 -0700 (PDT) Date: Sat, 23 Apr 2022 13:14:27 +0000 Message-Id: <20220423131427.237160-2-nathan@nathanrossi.com> In-Reply-To: <20220423131427.237160-1-nathan@nathanrossi.com> References: <20220423131427.237160-1-nathan@nathanrossi.com> From: Nathan Rossi To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nathan Rossi , Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Paolo Abeni Subject: [PATCH 2/2] net: dsa: mv88e6xxx: Handle single-chip-address OF property Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Handle the parsing and use of single chip addressing when the switch has the single-chip-address property defined. This allows for specifying the switch as using single chip addressing even when mdio address 0 is used by another device on the bus. This is a feature of some switches (e.g. the MV88E6341/MV88E6141) where the switch shares the bus only responding to the higher 16 addresses. Signed-off-by: Nathan Rossi --- drivers/net/dsa/mv88e6xxx/smi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/mv88e6xxx/smi.c b/drivers/net/dsa/mv88e6xxx/smi.c index a990271b74..1eb31c1563 100644 --- a/drivers/net/dsa/mv88e6xxx/smi.c +++ b/drivers/net/dsa/mv88e6xxx/smi.c @@ -171,9 +171,12 @@ static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = { int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip, struct mii_bus *bus, int sw_addr) { + struct device_node *np = chip->dev->of_node; + if (chip->info->dual_chip) chip->smi_ops = &mv88e6xxx_smi_dual_direct_ops; - else if (sw_addr == 0) + else if (sw_addr == 0 || + (np && of_property_read_bool(np, "single-chip-address"))) chip->smi_ops = &mv88e6xxx_smi_direct_ops; else if (chip->info->multi_chip) chip->smi_ops = &mv88e6xxx_smi_indirect_ops; --- 2.35.2