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From:   hammer hsieh <hammerh0314@gmail.com>
Date:   Mon, 25 Apr 2022 09:49:57 +0800
Message-ID: <CAOX-t57vzkVVO25EMCpvddmE++M1_a8RoDhbNk_M=ObbrqzZMA@mail.gmail.com>
Subject: Re: [PATCH v4 0/2] Add PWM driver for Suplus SP7021 SoC
To:     Thierry Reding <thierry.reding@gmail.com>
Cc:     =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= 
        <u.kleine-koenig@pengutronix.de>, lee.jones@linaro.org,
        robh+dt@kernel.org, linux-pwm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        wells.lu@sunplus.com, "hammer.hsieh" <hammer.hsieh@sunplus.com>
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Yes, my colleague is working on it right now.
But he submitted too many items at a time. (clock/reset/interrupt,
defconfig/, arch/arm...)
Current patch v13, still ongoing.
https://lore.kernel.org/all/cover.1649659095.git.qinjian@cqplus1.com/

Thierry Reding <thierry.reding@gmail.com> =E6=96=BC 2022=E5=B9=B44=E6=9C=88=
23=E6=97=A5 =E9=80=B1=E5=85=AD =E4=B8=8A=E5=8D=881:23=E5=AF=AB=E9=81=93=EF=
=BC=9A
>
> On Tue, Mar 22, 2022 at 06:42:59PM +0800, Hammer Hsieh wrote:
> > This is a patch series for PWM driver for Suplus SP7021 SoC.
> >
> > Sunplus SP7021 is an ARM Cortex A7 (4 cores) based SoC. It integrates
> > many peripherals (ex: UART. I2C, SPI, SDIO, eMMC, USB, SD card and
> > etc.) into a single chip. It is designed for industrial control.
>
> I just noticed as I was trying to do test builds that ARCH_SUNPLUS
> doesn't exist yet. Are there any plans to add those in the near future?
>
> I can always use COMPILE_TEST to do test build, but I like to also do
> proper builds because they sometimes flag things that COMPILE_TEST
> misses (like this one).
>
> Thierry