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From:   Jernej =?utf-8?B?xaBrcmFiZWM=?= <jernej.skrabec@gmail.com>
To:     Chen-Yu Tsai <wens@csie.org>, Maxime Ripard <mripard@kernel.org>,
        Samuel Holland <samuel@sholland.org>
Cc:     Samuel Holland <samuel@sholland.org>,
        Daniel Vetter <daniel@ffwll.ch>,
        David Airlie <airlied@linux.ie>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        dri-devel@lists.freedesktop.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-sunxi@lists.linux.dev
Subject: Re: [PATCH v3 12/14] drm/sun4i: Add support for D1 TCON TOP
Date:   Sun, 24 Apr 2022 22:06:06 +0200
Message-ID: <13000910.uLZWGnKmhe@kista>
In-Reply-To: <20220424162633.12369-13-samuel@sholland.org>
References: <20220424162633.12369-1-samuel@sholland.org> <20220424162633.12369-13-samuel@sholland.org>
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Precedence: bulk

Dne nedelja, 24. april 2022 ob 18:26:30 CEST je Samuel Holland napisal(a):
> D1 has a TCON TOP with TCON TV0 and DSI, but no TCON TV1. This puts the
> DSI clock name at index 1 in clock-output-names. Support this by only
> incrementing the index for clocks that are actually supported.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej Skrabec

> ---
> 
> (no changes since v1)
> 
>  drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun4i/
sun8i_tcon_top.c
> index 1b9b8b48f4a7..da97682b6835 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c
> @@ -189,22 +189,23 @@ static int sun8i_tcon_top_bind(struct device *dev, 
struct device *master,
>  	 * if TVE is active on each TCON TV. If it is, mux should be 
switched
>  	 * to TVE clock parent.
>  	 */
> +	i = 0;
>  	clk_data->hws[CLK_TCON_TOP_TV0] =
>  		sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs,
>  					     &tcon_top-
>reg_lock,
> -					     
TCON_TOP_TCON_TV0_GATE, 0);
> +					     
TCON_TOP_TCON_TV0_GATE, i++);
>  
>  	if (quirks->has_tcon_tv1)
>  		clk_data->hws[CLK_TCON_TOP_TV1] =
>  			sun8i_tcon_top_register_gate(dev, "tcon-
tv1", regs,
>  						     
&tcon_top->reg_lock,
> -						     
TCON_TOP_TCON_TV1_GATE, 1);
> +						     
TCON_TOP_TCON_TV1_GATE, i++);
>  
>  	if (quirks->has_dsi)
>  		clk_data->hws[CLK_TCON_TOP_DSI] =
>  			sun8i_tcon_top_register_gate(dev, "dsi", 
regs,
>  						     
&tcon_top->reg_lock,
> -						     
TCON_TOP_TCON_DSI_GATE, 2);
> +						     
TCON_TOP_TCON_DSI_GATE, i++);
>  
>  	for (i = 0; i < CLK_NUM; i++)
>  		if (IS_ERR(clk_data->hws[i])) {
> @@ -272,6 +273,10 @@ static const struct sun8i_tcon_top_quirks 
sun8i_r40_tcon_top_quirks = {
>  	.has_dsi	= true,
>  };
>  
> +static const struct sun8i_tcon_top_quirks sun20i_d1_tcon_top_quirks = {
> +	.has_dsi	= true,
> +};
> +
>  static const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = {
>  	/* Nothing special */
>  };
> @@ -282,6 +287,10 @@ const struct of_device_id sun8i_tcon_top_of_table[] = {
>  		.compatible = "allwinner,sun8i-r40-tcon-top",
>  		.data = &sun8i_r40_tcon_top_quirks
>  	},
> +	{
> +		.compatible = "allwinner,sun20i-d1-tcon-top",
> +		.data = &sun20i_d1_tcon_top_quirks
> +	},
>  	{
>  		.compatible = "allwinner,sun50i-h6-tcon-top",
>  		.data = &sun50i_h6_tcon_top_quirks
> -- 
> 2.35.1
> 
>