Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
References: <20220422084720.959271-1-xji@analogixsemi.com> <20220422084720.959271-4-xji@analogixsemi.com>
 <CAG3jFytWGSUM9mevHewdmEe-hq3JgB74s7_f0fsEQqkXr9VUHg@mail.gmail.com>
 <CAG3jFyvEYbwkdGtiNR-6vFEXTLjcyT_viqp9qeVxFTu0PrJEVA@mail.gmail.com> <CAGXv+5E1cCNWD98fMDjC38y2UztZd=PNQ+=G=wrBYfoXkswvHA@mail.gmail.com>
In-Reply-To: <CAGXv+5E1cCNWD98fMDjC38y2UztZd=PNQ+=G=wrBYfoXkswvHA@mail.gmail.com>
From:   Chen-Yu Tsai <wenst@chromium.org>
Date:   Mon, 25 Apr 2022 16:29:14 +0800
Message-ID: <CAGXv+5GUq=9v2q3A7aR+NK_oR=z7MpQQznjWa7bqWR1xEYoobw@mail.gmail.com>
Subject: Re: [PATCH v2 4/4] drm/bridge: anx7625: Use DPI bus type
To:     Robert Foss <robert.foss@linaro.org>, Xin Ji <xji@analogixsemi.com>
Cc:     dri-devel@lists.freedesktop.org, Jonas Karlman <jonas@kwiboo.se>,
        David Airlie <airlied@linux.ie>, qwen@analogixsemi.com,
        Neil Armstrong <narmstrong@baylibre.com>,
        linux-kernel@vger.kernel.org,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Andrzej Hajda <andrzej.hajda@intel.com>,
        bliang@analogixsemi.com
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

On Mon, Apr 25, 2022 at 4:24 PM Chen-Yu Tsai <wenst@chromium.org> wrote:
>
> On Fri, Apr 22, 2022 at 10:13 PM Robert Foss <robert.foss@linaro.org> wrote:
> >
> > On Fri, 22 Apr 2022 at 16:01, Robert Foss <robert.foss@linaro.org> wrote:
> > >
> > > On Fri, 22 Apr 2022 at 10:49, Xin Ji <xji@analogixsemi.com> wrote:
> > > >
> > > > As V4L2_FWNODE_BUS_TYPE_PARALLEL not properly descript for DPI
> > > > interface, this patch use new defined V4L2_FWNODE_BUS_TYPE_DPI for it.
> > > >
> > > > Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature")
> > > > Signed-off-by: Xin Ji <xji@analogixsemi.com>
> > > > ---
> > > >  drivers/gpu/drm/bridge/analogix/anx7625.c | 8 ++++----
> > > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > > index 376da01243a3..71df977e8f53 100644
> > > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c
> > > > @@ -1623,14 +1623,14 @@ static int anx7625_parse_dt(struct device *dev,
> > > >
> > > >         anx7625_get_swing_setting(dev, pdata);
> > > >
> > > > -       pdata->is_dpi = 1; /* default dpi mode */
> > > > +       pdata->is_dpi = 0; /* default dsi mode */
> > > >         pdata->mipi_host_node = of_graph_get_remote_node(np, 0, 0);
> > > >         if (!pdata->mipi_host_node) {
> > > >                 DRM_DEV_ERROR(dev, "fail to get internal panel.\n");
> > > >                 return -ENODEV;
> > > >         }
> > > >
> > > > -       bus_type = V4L2_FWNODE_BUS_TYPE_PARALLEL;
> > > > +       bus_type = 0;
> > > >         mipi_lanes = MAX_LANES_SUPPORT;
> > > >         ep0 = of_graph_get_endpoint_by_regs(np, 0, 0);
> > > >         if (ep0) {
> > > > @@ -1640,8 +1640,8 @@ static int anx7625_parse_dt(struct device *dev,
> > > >                 mipi_lanes = of_property_count_u32_elems(ep0, "data-lanes");
> > > >         }
> > > >
> > > > -       if (bus_type == V4L2_FWNODE_BUS_TYPE_PARALLEL) /* bus type is Parallel(DSI) */
> > > > -               pdata->is_dpi = 0;
> > > > +       if (bus_type == V4L2_FWNODE_BUS_TYPE_DPI) /* bus type is DPI */
> > > > +               pdata->is_dpi = 1;
> > > >
> > > >         pdata->mipi_lanes = mipi_lanes;
> > > >         if (pdata->mipi_lanes > MAX_LANES_SUPPORT || pdata->mipi_lanes <= 0)
> > >
> > > Reviewed-by: Robert Foss <robert.foss@linaro.org>
> >
> > Acked-by: Robert Foss <robert.foss@linaro.org>
>
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>
>
> Confirmed this fixes the display on Juniper (Acer Chromebook Spin 311) on
> mainline (next-20220422).

Forgot to mention, this device uses the already supported but broken (by
previous DPI patch) DSI interface.