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Received: from BN6PR1201MB0178.namprd12.prod.outlook.com (2603:10b6:405:55::20) by BY5PR12MB4196.namprd12.prod.outlook.com (2603:10b6:a03:205::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5186.14; Tue, 26 Apr 2022 08:40:58 +0000 Received: from BN6PR1201MB0178.namprd12.prod.outlook.com ([fe80::ed22:dd57:358b:9fb0]) by BN6PR1201MB0178.namprd12.prod.outlook.com ([fe80::ed22:dd57:358b:9fb0%10]) with mapi id 15.20.5186.021; Tue, 26 Apr 2022 08:40:57 +0000 Message-ID: <9e6d14a0-a658-195c-c7a3-7d2687a61544@amd.com> Date: Tue, 26 Apr 2022 14:10:43 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [PATCH v2 7/7] kvm: x86/cpuid: Fix CPUID leaf 0xA Content-Language: en-US To: Peter Zijlstra Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, x86@kernel.org, bp@alien8.de, dave.hansen@linux.intel.com, acme@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, namhyung@kernel.org, jolsa@kernel.org, tglx@linutronix.de, mingo@redhat.com, pbonzini@redhat.com, jmattson@google.com, like.xu.linux@gmail.com, eranian@google.com, ananth.narayan@amd.com, ravi.bangoria@amd.com, santosh.shukla@amd.com, puwen@hygon.cn References: <54bc7fe4cadf6bdef823bab1fba43d4891d2e1a9.1650515382.git.sandipan.das@amd.com> <20220426081550.GO2731@worktop.programming.kicks-ass.net> From: Sandipan Das In-Reply-To: <20220426081550.GO2731@worktop.programming.kicks-ass.net> Content-Type: text/plain; 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It >> advertises a PMU version which Qemu uses to determine the >> availability of additional MSRs to manage the PMCs. >> >> Upon receiving a KVM_GET_SUPPORTED_CPUID ioctl request for >> the same, the kernel constructs return values based on the >> x86_pmu_capability irrespective of the vendor. >> >> This leaf and the additional MSRs are not supported on AMD >> processors. If PerfMonV2 is detected, the PMU version is >> set to 2 and guest startup breaks because of an attempt to >> access a non-existent MSR. Return zeros to avoid this. >> >> Fixes: a6c06ed1a60a ("KVM: Expose the architectural performance monitoring CPUID leaf") >> Reported-by: Vasant Hegde >> Signed-off-by: Sandipan Das >> --- >> arch/x86/kvm/cpuid.c | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >> index 4b62d80bb22f..6bd65cad75ef 100644 >> --- a/arch/x86/kvm/cpuid.c >> +++ b/arch/x86/kvm/cpuid.c >> @@ -872,6 +872,11 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) >> union cpuid10_eax eax; >> union cpuid10_edx edx; >> >> + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { > > This is the obligatory question about HYGON; should they be included > here? > > x86 is getting a number of me-too patches from both sides, where > behaviour has diverged for no raisin and then needs to be fixed up > again. > From what I understand, Hygon processors also do not support this leaf. Copying Pu Wen for confirmation. - Sandipan >> + entry->eax = entry->ebx = entry->ecx = entry->edx = 0; >> + break; >> + } >> + >> perf_get_x86_pmu_capability(&cap); >> >> /* >> -- >> 2.32.0 >>