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Date:   Tue, 26 Apr 2022 13:27:07 +0200
From:   Robert Richter <rrichter@amd.com>
To:     Ravi Bangoria <ravi.bangoria@amd.com>
CC:     <peterz@infradead.org>, <acme@kernel.org>, <mingo@redhat.com>,
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Subject: Re: [PATCH 5/6] perf/tool/amd/ibs: Support new IBS bits in raw trace
 dump
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On 25.04.22 10:13:22, Ravi Bangoria wrote:

> @@ -71,11 +74,12 @@ union ibs_op_data {
>  union ibs_op_data2 {
>  	__u64 val;
>  	struct {
> -		__u64	data_src:3,	/* 0-2: data source */
> +		__u64	data_src_lo:3,	/* 0-2: data source low */
>  			reserved0:1,	/* 3: reserved */
>  			rmt_node:1,	/* 4: destination node */
>  			cache_hit_st:1,	/* 5: cache hit state */
> -			reserved1:57;	/* 5-63: reserved */
> +			data_src_hi:2,	/* 6-7: data source high */
> +			reserved1:56;	/* 8-63: reserved */

Good catch, bit 63 was not defined before.

>  	};
>  };

> @@ -279,6 +328,9 @@ bool evlist__has_amd_ibs(struct evlist *evlist)
>  		pmu_mapping += strlen(pmu_mapping) + 1 /* '\0' */;
>  	}
>  
> +	if (perf_env__find_pmu_cap(env, 0, "ibs_op", "zen4_ibs_extensions"))
> +		zen4_ibs_extensions = 1;
> +

This caps check should be moved to ibs_op and ibs_fetch pmu specific
code. Use the env of the specific pmu respectively in the sample
decoding.

-Robert

>  	if (ibs_fetch_type || ibs_op_type) {
>  		if (!cpu_family)
>  			parse_cpuid(env);