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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id j3-20020a170903028300b00158868a9a35si2519931plr.327.2022.04.27.10.37.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 10:37:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=pjZ16ya3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1BF0B35272; Wed, 27 Apr 2022 10:10:21 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243776AbiD0RN0 (ORCPT + 99 others); Wed, 27 Apr 2022 13:13:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240805AbiD0RNY (ORCPT ); Wed, 27 Apr 2022 13:13:24 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DA6331523; Wed, 27 Apr 2022 10:10:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1651079413; x=1682615413; h=from:to:cc:subject:date:message-id:mime-version; bh=eDfa2/kviCFf27bW2WJcuKmGmSrrtU2VkXmZsZa3IBA=; b=pjZ16ya3EIQx4wDWOfpHu/oAHm7kM+Z1YO9gEetrcMevVa5JmrfrwKXo kjlZ7GndyCAjhbDiPCYzIUt6yFzooazsgu1cUH99vkIHLC2KLQZzlue1U d6waRGSFGKPJJMclSJIduFXg5T6P01QsDe6zf1G36vwvFbe7lTOxH0cQC 8=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 27 Apr 2022 10:10:12 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2022 10:10:11 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 27 Apr 2022 10:10:10 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 27 Apr 2022 10:10:06 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , CC: Srinivasa Rao Mandadapu Subject: [PATCH v12 0/4] Add lpass pin control support for audio on sc7280 based targets Date: Wed, 27 Apr 2022 22:39:39 +0530 Message-ID: <1651079383-7665-1-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch set is to add lpass pin control support for Audio over I2S, wcd codec and digital mics. Changes Since V11: -- Move CRD specific pinmux nodes to crd specific file. Changes Since V10: -- Add lpass lpi pinmux and MI2S pinmux support for rev5+ boards. -- Remove dependency patches link in the cover-letter as it is merged. Changes Since V9: -- Remove redundant prefix in node name. Changes Since V8: -- Modify label and node names to lpass specific. -- Sort nodes as per node names and kind of nodes like pinctrl and device nodes. Changes Since V7: -- Sort mi2s pincontrol nodes as per node name. -- Fix typo errors. Changes Since V6: -- Move amp_en node to corresponding consumer patch. -- Update label and node names. -- Remove redundant drive-strengths. -- Remove herobrine crd specific mi2s configuration. Changes Since V5: -- Remove redundant function property in amp_en node. -- Move board specific properties of lpass pin control node to board specific file. -- Remove redundant properties in pin control nodes. -- Move wcd938x codec reset and CTIA/OMTP pin control patches to other series. Changes Since V4: -- Add primary and secondary I2S pinmux nodes for herobrine specific targets. Changes Since V3: -- Add pinctrl nodes for wcd codec reset and CTIA/OMTP headset selection. Changes Since V2: -- Move lpass pin control node to main dtsi file. -- Sort nodes alphabetically. -- Remove redundant wcd reset gpio nodes. -- Remove redundant input-enable field in dmic pin control nodes. -- Update amp_en node. -- Fix typo errors. -- Modify node names. -- Create patches on latest kernel. Changes Since V1: -- Merge pinmux and pinconf properties in amp_en and wcd pin reset node. -- Split common i2s pin control nodes to functionality specific nodes. -- Move board specific properties to board specific dtsi file. -- Update dmic pin control node name. Srinivasa Rao Mandadapu (4): arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for CRD 3.0/3.1 arm64: dts: qcom: sc7280: add lpass lpi pin controller node arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1 arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 98 +++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 98 +++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 147 ++++++++++++++++++++++ 3 files changed, 343 insertions(+) -- 2.7.4