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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id h15-20020a170902680f00b001587868e960si2017820plk.526.2022.04.27.10.46.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 10:46:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4E055443D7; Wed, 27 Apr 2022 10:19:38 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242615AbiD0RWd (ORCPT + 99 others); Wed, 27 Apr 2022 13:22:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234530AbiD0RWc (ORCPT ); Wed, 27 Apr 2022 13:22:32 -0400 Received: from mout.kundenserver.de (mout.kundenserver.de [212.227.17.10]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0726B43EEE; Wed, 27 Apr 2022 10:19:19 -0700 (PDT) Received: from mail-yb1-f177.google.com ([209.85.219.177]) by mrelayeu.kundenserver.de (mreue107 [213.165.67.113]) with ESMTPSA (Nemesis) id 1M3lHZ-1nk2AY3Yhf-000pwR; Wed, 27 Apr 2022 19:19:18 +0200 Received: by mail-yb1-f177.google.com with SMTP id y76so4637875ybe.1; Wed, 27 Apr 2022 10:19:17 -0700 (PDT) X-Gm-Message-State: AOAM531+el4QSdxw258V6dhpmKYBsthoDpzNMuJRfg2G2rqhJY7U0zPF tOAY0RJXUQchtqJqCDXOk4ygqMzOqVYwCMBmjFA= X-Received: by 2002:a25:75c5:0:b0:648:dccd:e1c with SMTP id q188-20020a2575c5000000b00648dccd0e1cmr2536236ybc.452.1651076102000; Wed, 27 Apr 2022 09:15:02 -0700 (PDT) MIME-Version: 1.0 References: <8cf9304d9941c25d920c4835cbc624ff5c2ac2cb.1644824638.git.quic_saipraka@quicinc.com> In-Reply-To: <8cf9304d9941c25d920c4835cbc624ff5c2ac2cb.1644824638.git.quic_saipraka@quicinc.com> From: Arnd Bergmann Date: Wed, 27 Apr 2022 18:14:46 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCHv10 5/6] lib: Add register read/write tracing support To: Sai Prakash Ranjan Cc: Will Deacon , Catalin Marinas , Arnd Bergmann , Steven Rostedt , Marc Zyngier , Trilok Soni , quic_psodagud@quicinc.com, gregkh , Linux ARM , Linux Kernel Mailing List , linux-arm-msm , Prasad Sodagudi Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:fNiZgmJlIJjWIct59kSQx8ulkmtN7VhuK0xD8FBYWGJHejqOqrI WFoOWk0Jgc7ITQkzCBP5gToDgyKqCqne6ABQKANTZkYzI1M5xyZ9RUDFVXiffCSp9+h9Zj1 UOaUe5K+szrhJSycphxyeSlW48qZTsHNffCN4KgdaxAMECjwlxLO5GZc/ro/Q3GDdbaDM5o q37ylgOliMyNA6s2ZlGGg== X-UI-Out-Filterresults: notjunk:1;V03:K0:mOXcYFdOMKM=:QmOMmZLYg82fxODCPrNcJ0 JSFAZq7c4sP4ApFc32S0zxRzq9pXxIuf1/FtJ/ltcbaIBDMqW2sWzroaY/plVcskhNUEixEsK 9qB5s94QXjaTur14KQdE1bO3mD2qeDKo6jClJxyGYNxGTGgZRMdgsBFiBI+zwdT5457qvykQG KtzY7BDW6aAKlLyZhTxHbrheYXdBUGfYjydv21D5O96VD3bqLz4g/sASmb+CqjS8QP7f24NbE Hv1yFrTMcgw1ecRKj15UGFZOHZQxypiY+JTz0eTjmJ5F2LVEprNAGpI0j6f7XbTZzs/0rDIZc JtaBpJKwXbjoxUPynlZdO1D8HdLGhlzFpXKg/Ai6goHh63fs75tSHhkx00iO6QLHsV8FyWIJj Y/CHAYNo8Lz83S2XZzf7YM2rxW+8ZegpOJDjzcFSH10BoZ46528Ga/+nJtTqfQLo7ldcGckNX EkiAXt8HLH3DvuQjpxf6W57oV1SiRQr5q+whbtup0clInB2B0Lb0W/X3soL/JQ3kX96XLWFDC yioUU8XbUrRZPYGqyx26m5PCmPSD4YwpvAJekKKBiPYSSE0T7SlWRPSzfI0xXLbEPzOEFyCnb 4LCFFDtw+SahIIwrOyxL4W0VBW4ua78M/c4791VuqB9RInnZiCuEwK3U5zteFDRt7beC+u52v V9OKFr67tL8nOBBR3QtLtojhYG3BiEMV1frW64JklzhkcMTT8a+t7LLIjgW4yJtAERwdrV1Q3 +6oKpKHEDbtMFdhfOz2ZCQrnzUSGis9snuu0tCA5hN77ikYFKyyMW0I173A0FigpnGDX/DR7J N4PKUBbPALox6FEjjz/W5hNkL2cYboQ2JFlwxUQlN8IZfcOt0Y= X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 24, 2022 at 7:07 AM Sai Prakash Ranjan wrote: > > From: Prasad Sodagudi > > Generic MMIO read/write i.e., __raw_{read,write}{b,l,w,q} accessors > are typically used to read/write from/to memory mapped registers > and can cause hangs or some undefined behaviour in following few > cases, > > * If the access to the register space is unclocked, for example: if > there is an access to multimedia(MM) block registers without MM > clocks. > > * If the register space is protected and not set to be accessible from > non-secure world, for example: only EL3 (EL: Exception level) access > is allowed and any EL2/EL1 access is forbidden. > > * If xPU(memory/register protection units) is controlling access to > certain memory/register space for specific clients. > > and more... > > Such cases usually results in instant reboot/SErrors/NOC or interconnect > hangs and tracing these register accesses can be very helpful to debug > such issues during initial development stages and also in later stages. > > So use ftrace trace events to log such MMIO register accesses which > provides rich feature set such as early enablement of trace events, > filtering capability, dumping ftrace logs on console and many more. > > Sample output: > > rwmmio_write: __qcom_geni_serial_console_write+0x160/0x1e0 width=32 val=0xa0d5d addr=0xfffffbfffdbff700 > rwmmio_post_write: __qcom_geni_serial_console_write+0x160/0x1e0 width=32 val=0xa0d5d addr=0xfffffbfffdbff700 > rwmmio_read: qcom_geni_serial_poll_bit+0x94/0x138 width=32 addr=0xfffffbfffdbff610 > rwmmio_post_read: qcom_geni_serial_poll_bit+0x94/0x138 width=32 val=0x0 addr=0xfffffbfffdbff610 > > Signed-off-by: Prasad Sodagudi > Co-developed-by: Sai Prakash Ranjan > Signed-off-by: Sai Prakash Ranjan I think this is ok in general. I saw that Steve had a minor comment, and I suppose you could have just resent the same patches with a fixup in order to have me pick it up into the asm-generic tree for 5.19. There is one more thing that I saw looking through this patch again: the address you print is the virtual __iomem token, but it might be more valuable to have the physical address instead, which can be looked up in the devicetree to know which register is affected. There is a small extra cost to walk the page table, and I'm not sure if we actually have an interface for it (vmalloc_to_page is almost what we want, but it returns an invalid page pointer). Any suggestions on this? Arnd