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Date:   Fri, 29 Apr 2022 17:22:03 +0200
From:   Fabien Parent <fparent@baylibre.com>
To:     Matthias Brugger <matthias.bgg@gmail.com>
Cc:     Macpaul Lin <macpaul.lin@mediatek.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/7] arm64: dts: mediatek: mt8195-demo: enable ethernet
Message-ID: <20220429152203.ppuimwcka5d6rvq4@radium>
References: <20220426134106.242353-1-fparent@baylibre.com>
 <20220426134106.242353-6-fparent@baylibre.com>
 <c0cf89c05ee708ec3648b267c1c0a0baa1331836.camel@mediatek.com>
 <f4256b5e-e6b8-f9de-fe97-3e9c6cdcb00c@gmail.com>
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On Fri, Apr 29, 2022 at 04:00:32PM +0200, Matthias Brugger wrote:
>=20
>=20
> On 27/04/2022 08:25, Macpaul Lin wrote:
> > On Tue, 2022-04-26 at 15:41 +0200, Fabien Parent wrote:
> > > Enable ethernet on the MT8195 demo board.
> > >=20
> > > Signed-off-by: Fabien Parent <fparent@baylibre.com>
> > > ---
> > >   arch/arm64/boot/dts/mediatek/mt8195-demo.dts | 108
> > > +++++++++++++++++++
> > >   1 file changed, 108 insertions(+)
> > >=20
> > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > index 08cab3b3943b..0b7985486e2a 100644
> > > --- a/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > +++ b/arch/arm64/boot/dts/mediatek/mt8195-demo.dts
> > > @@ -80,6 +80,30 @@ optee_reserved: optee@43200000 {
> > >   	};
> > >   };
> > > +&eth {
> > > +	phy-mode =3D "rgmii-rxid";
> > > +	phy-handle =3D <&eth_phy>;
> > > +	snps,reset-gpio =3D <&pio 93 GPIO_ACTIVE_HIGH>;
> > > +	snps,reset-delays-us =3D <0 10000 10000>;
> > > +	mediatek,tx-delay-ps =3D <2030>;
> > > +	pinctrl-names =3D "default", "sleep";
> > > +	pinctrl-0 =3D <&eth_default_pins>;
> > > +	pinctrl-1 =3D <&eth_sleep_pins>;
> > > +	status =3D "okay";
> > > +
> > > +	mdio {
> > > +		compatible =3D "snps,dwmac-mdio";
> > > +		#address-cells =3D <1>;
> > > +		#size-cells =3D <0>;
> > > +
> > > +		eth_phy: phy@1 {
> > > +			compatible =3D "ethernet-phy-id001c.c916";
> > > +			#phy-cells =3D <0>;
> > > +			reg =3D <0x1>;
> > > +		};
> > > +	};
> > > +};
> > > +
> > >   &i2c6 {
> > >   	clock-frequency =3D <400000>;
> > >   	pinctrl-0 =3D <&i2c6_pins>;
> > > @@ -260,6 +284,90 @@ &mt6359_vsram_others_ldo_reg {
> > >   };
> > >   &pio {
> > > +	eth_default_pins: eth-default-pins {
> > > +		pins-cc {
> > > +			pinmux =3D <PINMUX_GPIO85__FUNC_GBE_TXC>,
> > > +				 <PINMUX_GPIO88__FUNC_GBE_TXEN>,
> > > +				 <PINMUX_GPIO87__FUNC_GBE_RXDV>,
> > > +				 <PINMUX_GPIO86__FUNC_GBE_RXC>;
> > > +			drive-strength =3D <MTK_DRIVE_8mA>;
> > > +		};
> > > +
> > > +		pins-mdio {
> > > +			pinmux =3D <PINMUX_GPIO89__FUNC_GBE_MDC>,
> > > +				 <PINMUX_GPIO90__FUNC_GBE_MDIO>;
> > > +			input-enable;
> > > +		};
> > > +
> > > +		pins-phy-reset {
> > > +			pinmux =3D <PINMUX_GPIO93__FUNC_GPIO93>;
> > > +		};
> > > +
> > > +		pins-power {
> > > +			pinmux =3D <PINMUX_GPIO91__FUNC_GPIO91>,
> > > +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> > > +			output-high;
> > > +		};
> > > +
> > > +		pins-rxd {
> > > +			pinmux =3D <PINMUX_GPIO81__FUNC_GBE_RXD3>,
> > > +				 <PINMUX_GPIO82__FUNC_GBE_RXD2>,
> > > +				 <PINMUX_GPIO83__FUNC_GBE_RXD1>,
> > > +				 <PINMUX_GPIO84__FUNC_GBE_RXD0>;
> > > +		};
> > > +
> > > +		pins-txd {
> > > +			pinmux =3D <PINMUX_GPIO77__FUNC_GBE_TXD3>,
> > > +				 <PINMUX_GPIO78__FUNC_GBE_TXD2>,
> > > +				 <PINMUX_GPIO79__FUNC_GBE_TXD1>,
> > > +				 <PINMUX_GPIO80__FUNC_GBE_TXD0>;
> > > +			drive-strength =3D <MTK_DRIVE_8mA>;
> > > +		};
> > > +	};
> > > +
> > > +	eth_sleep_pins: eth-sleep-pins {
> > > +		pins-cc {
> > > +			pinmux =3D <PINMUX_GPIO85__FUNC_GPIO85>,
> > > +				 <PINMUX_GPIO88__FUNC_GPIO88>,
> > > +				 <PINMUX_GPIO87__FUNC_GPIO87>,
> > > +				 <PINMUX_GPIO86__FUNC_GPIO86>;
> > > +		};
> > > +
> > > +		pins-mdio {
> > > +			pinmux =3D <PINMUX_GPIO89__FUNC_GPIO89>,
> > > +				 <PINMUX_GPIO90__FUNC_GPIO90>;
> > > +			input-disable;
> > > +			bias-disable;
> > > +		};
> > > +
> > > +		pins-phy-reset {
> > > +			pinmux =3D <PINMUX_GPIO93__FUNC_GPIO93>;
> > > +			input-disable;
> > > +			bias-disable;
> > > +		};
> > > +
> > > +		pins-power {
> > > +			pinmux =3D <PINMUX_GPIO91__FUNC_GPIO91>,
> > > +				 <PINMUX_GPIO92__FUNC_GPIO92>;
> > > +			input-disable;
> > > +			bias-disable;
> > > +		};
> > > +
> > > +		pins-rxd {
> > > +			pinmux =3D <PINMUX_GPIO81__FUNC_GPIO81>,
> > > +				 <PINMUX_GPIO82__FUNC_GPIO82>,
> > > +				 <PINMUX_GPIO83__FUNC_GPIO83>,
> > > +				 <PINMUX_GPIO84__FUNC_GPIO84>;
> > > +		};
> > > +
> > > +		pins-txd {
> > > +			pinmux =3D <PINMUX_GPIO77__FUNC_GPIO77>,
> > > +				 <PINMUX_GPIO78__FUNC_GPIO78>,
> > > +				 <PINMUX_GPIO79__FUNC_GPIO79>,
> > > +				 <PINMUX_GPIO80__FUNC_GPIO80>;
> > > +		};
> > > +	};
> > > +
> > >   	gpio_keys_pins: gpio-keys-pins {
> > >   		pins {
> > >   			pinmux =3D <PINMUX_GPIO106__FUNC_GPIO106>;
> >=20
> > Tested-by: Macpaul Lin <macpaul.lin@mediatek.com>
> >=20
>=20
> I get the following error:
> Error: arch/arm64/boot/dts/mediatek/mt8195.dtsi:582.26-27 syntax error

I think he used my upstreaming branch where I store the patches I sent
and will send to the mailing list: [0].

I forgot there is a dependency between this patch and [1], and I forgot
to test this patch serie independenly from the other commits from my
branch. I will make sure to not forget next time.

So from this patch serie, only patch 1-2, 6-7 can be applied since they
don't have any hidden dependency:
  dt-bindings: usb: mediatek,mtu3: add binding for MT8195 SoC
  arm64: dts: mediatek: mt8195: add ssusb support
  arm64: dts: mediatek: mt8195-demo: Remove input-name property
  arm64: dts: mediatek: mt8195-demo: enable uart1

[0] https://github.com/Fabo/linux/tree/mt8195-demo
[1] https://lore.kernel.org/all/20210615173233.26682-7-tinghan.shen@mediate=
k.com/

>=20
>=20
>=20
> How did you test?
>=20
> Regards,
> Matthias

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