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From:   Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
To:     tudor.ambarus@microchip.com, p.yadav@ti.com, michael@walle.cc,
        miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com
Cc:     linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
        quic_asutoshd@quicinc.com, quic_rampraka@quicinc.com,
        quic_pragalla@quicinc.com, quic_sartgarg@quicinc.com,
        quic_nitirawa@quicinc.com, quic_sayalil@quicinc.com,
        Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Subject: [PATCH V9] mtd: spi-nor: winbond: add support for W25Q512NW-IM
Date:   Fri, 29 Apr 2022 17:40:39 +0530
Message-Id: <1651234239-32217-1-git-send-email-quic_c_sbhanu@quicinc.com>
Precedence: bulk

Add support for winbond W25Q512NW-IM chip.

Below are the tests done:

1. Verified flashing binary image on spi card using flashrom tool.
2. Verified OTP support, below are the test results:

 localhost / # cat
 /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/spi16/
 spi16.0/spi-nor/jedec_id
 ef8020

 localhost / # cat
 /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/spi16/
 spi16.0/spi-nor/manufacturer
 winbond

 localhost / # cat
 /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/spi16/
 spi16.0/spi-nor/partname
 w25q512nwm

 localhost / # hexdump
 /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/sp
 i16/spi16.0/spi-nor/sfdp
 0000000 4653 5044 0106 ff01 0600 1001 0080 ff00
 0000010 0084 0201 00d0 ff00 ffff ffff ffff ffff
 0000020 6800 6c65 6f6c 7720 726f 646c ffff ffff
 0000030 ffff ffff ffff ffff ffff ffff ffff ffff
 *
 0000080 20e5 fffb ffff 1fff eb44 6b08 3b08 bb42
 0000090 fffe ffff ffff 0000 ffff eb40 200c 520f
 00000a0 d810 0000 0233 00a6 e781 d914 63e9 3376
 00000b0 757a 757a bdf7 5cd5 f719 ff5d 70e9 a5f9
 00000c0 ffff ffff ffff ffff ffff ffff ffff ffff
 00000d0 0aff fff0 ff21 ffdc
 00000d8

 localhost / # md5sum
 /sys/bus/platform/devices/soc\@0/88dc000.spi/spi_master/spi
 16/spi16.0/spi-nor/sfdp
 106d89d6c049110bc94c01517cb4ce24
 /sys/bus/platform/devices/soc@0/88dc000.spi/
 spi_master/spi16/spi16.0/spi-nor/sfdp

Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Michael Walle <michael@walle.cc>

---
Changes since V1:
	- Added space before name of the flash part as suggested by
	  Doug.

Changes since V2:
	- Updated chip name as w25q512nwm as suggested by Doug.

Changes since V3:
	- Updated flash_info flags passing according to
	  below patch.

Changes since V4:
	- Added OTP support for SPI card as suggested by Michael Walle.
	- Updated SFDP flags passing as suggested by Pratyush Yadav.

Changes since V5:
	- Reordered flags passing info for spi nor as suggested by
	  Michael Walle.

Changes since V6:
	- Updated commit subject and added md5sum in commit as suggested
	  by Michael Walle.
	- Reordered flags passing info for spi nor which has missed in
	  V5 patch as suggested by Michael Walle.

Changes since V7:
	- Updated commit message with test cases info as suggested by
	  Tudor Ambarus.

Changes since V8:
	- Removed flash lock flags as lock not working as excepted.
---
 drivers/mtd/spi-nor/winbond.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index fe80dff..f2b625a 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -124,6 +124,9 @@ static const struct flash_info winbond_nor_parts[] = {
 	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ |
 			      SPI_NOR_DUAL_READ) },
+	{ "w25q512nwm", INFO(0xef8020, 0, 64 * 1024, 1024)
+		PARSE_SFDP
+		OTP_INFO(256, 3, 0x1000, 0x1000) },
 	{ "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
 			      SPI_NOR_QUAD_READ) },
-- 
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