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Date:   Mon, 2 May 2022 12:04:05 -0700 (PDT)
From:   matthew.gerlach@linux.intel.com
To:     Rob Herring <robh@kernel.org>
cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        devicetree@vger.kernel.org, dinguyen@vger.kernel.org,
        robh+dt@vger.kernel.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Subject: Re: [PATCH] arm64: dts: intel: add device tree for n6000
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References: <20220502165818.4002157-1-matthew.gerlach@linux.intel.com> <CAL_JsqKwr7Je51X=OVd5Mfxe=Ztvp7jY2WcTu+treB3x7QBxfA@mail.gmail.com>
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On Mon, 2 May 2022, Rob Herring wrote:

> On Mon, May 2, 2022 at 11:58 AM <matthew.gerlach@linux.intel.com> wrote:
>>
>> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>>
>> Add a device tree for the n6000 instantiation of Agilex
>> Hard Processor System (HPS).
>>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>> ---
>>  arch/arm64/boot/dts/intel/Makefile            |  1 +
>>  .../boot/dts/intel/socfpga_agilex_n6000.dts   | 77 +++++++++++++++++++
>>  2 files changed, 78 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
>>
>> diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
>> index 0b5477442263..1425853877cc 100644
>> --- a/arch/arm64/boot/dts/intel/Makefile
>> +++ b/arch/arm64/boot/dts/intel/Makefile
>> @@ -1,5 +1,6 @@
>>  # SPDX-License-Identifier: GPL-2.0-only
>>  dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_socdk.dtb \
>>                                 socfpga_agilex_socdk_nand.dtb \
>> +                               socfpga_agilex_n6000.dtb \
>
> Alphabetical order.

Got it.
>
>>                                 socfpga_n5x_socdk.dtb
>>  dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
>> new file mode 100644
>> index 000000000000..07f5a5983e5c
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
>> @@ -0,0 +1,77 @@
>> +// SPDX-License-Identifier:     GPL-2.0
>> +/*
>> + * Copyright (C) 2021-2022, Intel Corporation
>> + */
>> +#include "socfpga_agilex.dtsi"
>> +
>> +/ {
>> +       model = "SoCFPGA Agilex n6000";
>> +
>> +       aliases {
>> +               serial0 = &uart1;
>> +               serial1 = &uart0;
>> +               ethernet0 = &gmac0;
>> +               ethernet1 = &gmac1;
>> +               ethernet2 = &gmac2;
>> +       };
>> +
>> +       chosen {
>> +               stdout-path = "serial0:115200n8";
>> +       };
>> +
>> +       memory {
>> +               device_type = "memory";
>> +               /* We expect the bootloader to fill in the reg */
>> +               reg = <0 0 0 0>;
>> +       };
>> +
>> +       soc {
>> +               clocks {
>> +                       osc1 {
>> +                               clock-frequency = <25000000>;
>> +                       };
>> +               };
>> +               agilex_hps_bridges: bridge@80000000 {
>> +                       compatible = "simple-bus";
>> +                       reg = <0x80000000 0x60000000>,
>> +                               <0xf9000000 0x00100000>;
>> +                       reg-names = "axi_h2f", "axi_h2f_lw";
>> +                       #address-cells = <0x2>;
>> +                       #size-cells = <0x1>;
>> +                       ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
>> +
>> +                       uio_cp_eng@0xf9000000 {
>
> Unit addresses shouldn't have '0x' and the address is wrong as it
> should match the child address (0). dtc will tell you this though you
> need 'W=1'. Run this and schema checks and don't add new warnings.

Thanks for the pointers.  I will run with W=1 and run schema checks and 
submit a v2.

>
>> +                               compatible = "generic-uio";
>
> NAK. Not documented and that's because this is not a h/w device.

Got it.  I will create a meaningful name for the h/w device and submit 
documentation.

>
>> +                               reg = <0x00000000 0x00000000 0x00001000>;
>> +                               status = "okay";
>
> That's the default.

I will remove redundant status field.

>
>> +                       };
>> +               };
>> +       };
>> +};
>> +
>> +&uart0 {
>> +       status = "okay";
>> +};
>> +
>> +&uart1 {
>> +       status = "okay";
>> +};
>> +
>> +&spi0 {
>> +       status = "okay";
>> +
>> +       spidev: spidev@0 {
>> +               status = "okay";
>> +               compatible = "linux,spidev";
>> +               spi-max-frequency = <25000000>;
>> +               reg = <0>;
>> +       };
>> +};
>> +
>> +&watchdog0 {
>> +       status = "okay";
>> +};
>> +
>> +&fpga_mgr {
>> +       status = "disabled";
>> +};
>> --
>> 2.25.1
>>
>