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Message-ID: <19bacaa9-4b63-37d3-aefc-23b4efe54516@amd.com>
Date:   Mon, 2 May 2022 10:22:02 -0500
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Subject: Re: [PATCHv5] drm/amdgpu: vi: disable ASPM on Intel Alder Lake based
 systems
Content-Language: en-US
To:     Paul Menzel <pmenzel@molgen.mpg.de>
Cc:     alexander.deucher@amd.com, christian.koenig@amd.com,
        xinhui.pan@amd.com, airlied@linux.ie, daniel@ffwll.ch,
        amd-gfx@lists.freedesktop.org, kernel test robot <lkp@intel.com>,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        mario.limonciello@amd.com
References: <20220429160604.2608782-1-richard.gong@amd.com>
 <232384f1-c888-33f7-07dd-b99545f1b115@molgen.mpg.de>
From:   "Gong, Richard" <richard.gong@amd.com>
In-Reply-To: <232384f1-c888-33f7-07dd-b99545f1b115@molgen.mpg.de>
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Hi Paul,

On 5/1/2022 2:14 AM, Paul Menzel wrote:
> Dear Richard,
>
>
> Am 29.04.22 um 18:06 schrieb Richard Gong:
>> Active State Power Management (ASPM) feature is enabled since kernel 
>> 5.14.
>> There are some AMD Volcanic Islands (VI) GFX cards, such as the 
>> WX3200 and
>> RX640, that do not work with ASPM-enabled Intel Alder Lake based 
>> systems.
>> Using these GFX cards as video/display output, Intel Alder Lake based
>> systems will freeze after suspend/resume.
>
> As replied in v4 just now, “freeze” is misleading if you can still run 
> `dmesg` after resume.
As my comments in v4, we can't run 'dmesg' when issue occurred. User 
have to recycle power to reset the system.
>
>
> Kind regards,
>
> Paul

Regards,

Richard

>
>
>> The issue was originally reported on one system (Dell Precision 3660 
>> with
>> BIOS version 0.14.81), but was later confirmed to affect at least 4
>> pre-production Alder Lake based systems.
>>
>> Add an extra check to disable ASPM on Intel Alder Lake based systems 
>> with
>> the problematic AMD Volcanic Islands GFX cards.
>>
>> Fixes: 0064b0ce85bb ("drm/amd/pm: enable ASPM by default")
>> Link: 
>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fdrm%2Famd%2F-%2Fissues%2F1885&amp;data=05%7C01%7Crichard.gong%40amd.com%7C78173acb0fe3463fead808da2b423e81%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637869860787352219%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;sdata=TK3Ur99Ro4OczgUlCpdod6CrvgGJvNZAyUfpzKEqExw%3D&amp;reserved=0
>> Reported-by: kernel test robot <lkp@intel.com>
>> Signed-off-by: Richard Gong <richard.gong@amd.com>
>> ---
>> v5: added vi to commit header and updated commit message
>>      rolled back guard with the preprocessor as did in v2 to correct 
>> build
>>      error on non-x86 systems
>> v4: s/CONFIG_X86_64/CONFIG_X86
>>      enhanced check logic
>> v3: s/intel_core_aspm_chk/aspm_support_quirk_check
>>      correct build error with W=1 option
>> v2: correct commit description
>>      move the check from chip family to problematic platform
>> ---
>>   drivers/gpu/drm/amd/amdgpu/vi.c | 17 ++++++++++++++++-
>>   1 file changed, 16 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c 
>> b/drivers/gpu/drm/amd/amdgpu/vi.c
>> index 039b90cdc3bc..45f0188c4273 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vi.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
>> @@ -81,6 +81,10 @@
>>   #include "mxgpu_vi.h"
>>   #include "amdgpu_dm.h"
>>   +#if IS_ENABLED(CONFIG_X86)
>> +#include <asm/intel-family.h>
>> +#endif
>> +
>>   #define ixPCIE_LC_L1_PM_SUBSTATE    0x100100C6
>>   #define PCIE_LC_L1_PM_SUBSTATE__LC_L1_SUBSTATES_OVERRIDE_EN_MASK 
>> 0x00000001L
>>   #define PCIE_LC_L1_PM_SUBSTATE__LC_PCI_PM_L1_2_OVERRIDE_MASK 
>> 0x00000002L
>> @@ -1134,13 +1138,24 @@ static void vi_enable_aspm(struct 
>> amdgpu_device *adev)
>>           WREG32_PCIE(ixPCIE_LC_CNTL, data);
>>   }
>>   +static bool aspm_support_quirk_check(void)
>> +{
>> +#if IS_ENABLED(CONFIG_X86)
>> +    struct cpuinfo_x86 *c = &cpu_data(0);
>> +
>> +    return !(c->x86 == 6 && c->x86_model == INTEL_FAM6_ALDERLAKE);
>> +#else
>> +    return true;
>> +#endif
>> +}
>> +
>>   static void vi_program_aspm(struct amdgpu_device *adev)
>>   {
>>       u32 data, data1, orig;
>>       bool bL1SS = false;
>>       bool bClkReqSupport = true;
>>   -    if (!amdgpu_device_should_use_aspm(adev))
>> +    if (!amdgpu_device_should_use_aspm(adev) || 
>> !aspm_support_quirk_check())
>>           return;
>>         if (adev->flags & AMD_IS_APU ||