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[23.128.96.19]) by mx.google.com with ESMTPS id j71-20020a63804a000000b003c239350d8esi2992739pgd.843.2022.05.02.17.27.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 May 2022 17:28:06 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b="XuVYe/40"; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 818DA3EAA2; Mon, 2 May 2022 17:22:43 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1386452AbiEBRL4 (ORCPT + 99 others); Mon, 2 May 2022 13:11:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1382436AbiEBRLy (ORCPT ); Mon, 2 May 2022 13:11:54 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D56C2BD7; Mon, 2 May 2022 10:08:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1651511305; x=1683047305; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=AR3nROx9kSazZj+h7yJIP1c+hNRzoH3odyY+rnljXck=; b=XuVYe/40Gs8oIqhQP7N11o3QMEAu9kMBr5eKJUFbVH1oXGbCAScnerfm rjJhS3mZuomrtVeCBbI4CcLmyeYsxcH3vf8Wxqyu/VdUebpcD+kfpc8sN EKx2E/5enxVirwSYCgCXXPjTGxE/sjOZiCS8LTacsiR3GAq3tewpmyJou c=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-02.qualcomm.com with ESMTP; 02 May 2022 10:08:25 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2022 10:08:25 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 2 May 2022 10:08:24 -0700 Received: from kaushalk-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Mon, 2 May 2022 10:08:21 -0700 From: Kaushal Kumar To: , , , CC: , , , , "Kaushal Kumar" Subject: [PATCH v3 1/4] ARM: dts: qcom: sdx65: Add QPIC BAM support Date: Mon, 2 May 2022 10:08:03 -0700 Message-ID: <1651511286-18690-2-git-send-email-quic_kaushalk@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1651511286-18690-1-git-send-email-quic_kaushalk@quicinc.com> References: <1651511286-18690-1-git-send-email-quic_kaushalk@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add devicetree node to enable support for QPIC BAM DMA controller on Qualcomm SDX65 platform. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Kaushal Kumar --- arch/arm/boot/dts/qcom-sdx65.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index a64be20..d6a6087 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -199,6 +199,18 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + qpic_bam: dma-controller@1b04000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x01b04000 0x1c000>; + interrupts = ; + clocks = <&rpmhcc RPMH_QPIC_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + qcom,controlled-remotely; + status = "disabled"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x01f40000 0x40000>; -- 2.7.4