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[23.128.96.19]) by mx.google.com with ESMTPS id f17-20020a056a00229100b0050d8195100bsi16333589pfe.7.2022.05.02.17.43.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 May 2022 17:43:05 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=jmu.edu.cn Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4869341F93; Mon, 2 May 2022 17:33:04 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385635AbiEBPEj (ORCPT + 99 others); Mon, 2 May 2022 11:04:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239046AbiEBPEi (ORCPT ); Mon, 2 May 2022 11:04:38 -0400 Received: from mail-m17638.qiye.163.com (mail-m17638.qiye.163.com [59.111.176.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EED70101FD; Mon, 2 May 2022 08:01:08 -0700 (PDT) Received: from localhost.localdomain (unknown [IPV6:2001:250:6801:5501:163d:f2ff:fecb:5632]) by mail-m17638.qiye.163.com (Hmail) with ESMTPA id 9651E1C01BB; Mon, 2 May 2022 23:01:06 +0800 (CST) From: Chukun Pan To: Maxime Ripard Cc: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Chukun Pan Subject: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for OrangePi One Plus Date: Mon, 2 May 2022 23:01:01 +0800 Message-Id: <20220502150101.45200-1-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUhPN1dZLVlBSVdZDwkaFQgSH1lBWUMeGRlWSkxLGExCTEtLGE hJVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWU9LSFVKSktISkNVS1kG X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6MyI6Shw6Az01EBUdTCM0MEgM Di1PCw1VSlVKTU5KTktITU1MSU5LVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUlL S0pBSU5LQU1DS0pBTk5LSkFKTUgfQR1JHR1BHR4YGUFOTUhJWVdZCAFZQUhLQ0w3Bg++ X-HM-Tid: 0a80854a16bed993kuws9651e1c01bb X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable CPU opp tables for OrangePi One Plus. This needs to change the CPU regulator max voltage to fit the OPP table. Also add the ramp-delay information to avoid any out of spec running as the regulator is slower at reaching the voltage requested compare to the PLL reaching the frequency. There is no such information for AXP805 but similar PMIC (AXP813) has a DVM (Dynamic Voltage scaling Management) ramp rate equal to 2500uV/us. Signed-off-by: Chukun Pan --- arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi index 92745128fcfe..d7b82ef6be55 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi @@ -5,6 +5,7 @@ /dts-v1/; #include "sun50i-h6.dtsi" +#include "sun50i-h6-cpu-opp.dtsi" #include @@ -64,6 +65,10 @@ reg_vcc5v: vcc5v { }; }; +&cpu0 { + cpu-supply = <®_dcdca>; +}; + &de { status = "okay"; }; @@ -208,7 +213,8 @@ reg_cldo3: cldo3 { reg_dcdca: dcdca { regulator-always-on; regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; + regulator-max-microvolt = <1160000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-cpu"; }; @@ -216,6 +222,7 @@ reg_dcdcc: dcdcc { regulator-enable-ramp-delay = <32000>; regulator-min-microvolt = <810000>; regulator-max-microvolt = <1080000>; + regulator-ramp-delay = <2500>; regulator-name = "vdd-gpu"; }; -- 2.25.1