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Message-ID: <5e93e411e1100c5d8292327b9aea560bfcbda7d1.camel@pengutronix.de>
Subject: Re: [PATCH v1 4/4] arm64: dts: imx8mm.dtsi: Add resets for dispmix
 power domain.
From:   Lucas Stach <l.stach@pengutronix.de>
To:     Viraj Shah <viraj.shah@linutronix.de>, shawnguo@kernel.org,
        s.hauer@pengutronix.de
Cc:     Pengutronix Kernel Team <kernel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        Adam Ford <aford173@gmail.com>,
        Tim Harvey <tharvey@gateworks.com>,
        Peng Fan <peng.fan@nxp.com>, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Date:   Mon, 02 May 2022 12:14:57 +0200
In-Reply-To: <20220502100233.6023-5-viraj.shah@linutronix.de>
References: <20220502100233.6023-1-viraj.shah@linutronix.de>
         <20220502100233.6023-5-viraj.shah@linutronix.de>
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Am Montag, dem 02.05.2022 um 12:02 +0200 schrieb Viraj Shah:
> The resets are controlled from src. From reference manual page
> 959, display controller needs DISP_RESET bit to be set to reset
> dispmix.
> 
This reset is driven by the GPC hardware logic. Only if you are 100%
sure that this is not the case should a reset be added to the DT, as
handling it both from the GPC HW sequencing and software has proven to
be problematic and result in sporadic hangs.

Regards,
Lucas

> Signed-off-by: Viraj Shah <viraj.shah@linutronix.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 1ee05677c2dd..11a6cae5bb99 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -734,6 +734,7 @@
>  						assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_1000M>,
>  									 <&clk IMX8MM_SYS_PLL1_800M>;
>  						assigned-clock-rates = <500000000>, <200000000>;
> +						resets = <&src IMX8MQ_RESET_DISP_RESET>;
>  					};
>  
>  					pgc_mipi: power-domain@11 {