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From:   Viraj Shah <viraj.shah@linutronix.de>
To:     shawnguo@kernel.org, s.hauer@pengutronix.de
Cc:     Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        NXP Linux Team <linux-imx@nxp.com>,
        Lucas Stach <l.stach@pengutronix.de>,
        Peng Fan <peng.fan@nxp.com>,
        Frieder Schrempf <frieder.schrempf@kontron.de>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Dan Carpenter <dan.carpenter@oracle.com>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
Subject: [PATCH v1 0/4] imx8mm display controller power sequence 
Date:   Mon,  2 May 2022 12:02:29 +0200
Message-Id: <20220502100233.6023-1-viraj.shah@linutronix.de>
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This patch queue addresses the power sequence of the display controller
of the imx8mm SoC. The sequence mentioned in example code 5 in section
5.2.9.5 of reference manual imx-8MMini-yhsc.pdf was not being performed.
This meant that the display controller was not coming up.

Viraj Shah (4):
  soc: imx: gpcv2: Power sequence for DISP
  soc: imx: imx8m-blk-ctrl: Display Power ON sequence
  soc: imx: imx8m-blk-ctrl: Add reset bits for mipi dsi phy
  arm64: dts: imx8mm.dtsi: Add resets for dispmix power domain.

 arch/arm64/boot/dts/freescale/imx8mm.dtsi |  1 +
 drivers/soc/imx/gpcv2.c                   | 36 +++++++++++++++++++----
 drivers/soc/imx/imx8m-blk-ctrl.c          |  9 ++++--
 3 files changed, 38 insertions(+), 8 deletions(-)

-- 
2.20.1