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Subject: Re: [PATCH] arm64: dts: allwinner: h6: Enable CPU opp tables for
 OrangePi One Plus
To:     Chukun Pan <amadeus@jmu.edu.cn>, Maxime Ripard <maxime@cerno.tech>
Cc:     Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org
References: <20220502150101.45200-1-amadeus@jmu.edu.cn>
From:   Samuel Holland <samuel@sholland.org>
Message-ID: <16b5d02f-5fa0-3094-1fc2-5b8322f047b0@sholland.org>
Date:   Mon, 2 May 2022 21:24:07 -0500
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On 5/2/22 10:01 AM, Chukun Pan wrote:
> Enable CPU opp tables for OrangePi One Plus.
> 
> This needs to change the CPU regulator max voltage to fit
> the OPP table.
> 
> Also add the ramp-delay information to avoid any out of spec
> running as the regulator is slower at reaching the voltage
> requested compare to the PLL reaching the frequency.
> 
> There is no such information for AXP805 but similar PMIC (AXP813)
> has a DVM (Dynamic Voltage scaling Management) ramp rate equal
> to 2500uV/us.

The AXP805 datasheet has this information in the description for REG 1A. DVM is
disabled by default, and when it is enabled, the default ramp rate is 10
mV/15.625 us == 640 uV/us.

Did you notice any instability without this delay?

> Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
> index 92745128fcfe..d7b82ef6be55 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
> @@ -5,6 +5,7 @@
>  /dts-v1/;
>  
>  #include "sun50i-h6.dtsi"
> +#include "sun50i-h6-cpu-opp.dtsi"
>  
>  #include <dt-bindings/gpio/gpio.h>
>  
> @@ -64,6 +65,10 @@ reg_vcc5v: vcc5v {
>  	};
>  };
>  
> +&cpu0 {
> +	cpu-supply = <&reg_dcdca>;
> +};
> +
>  &de {
>  	status = "okay";
>  };
> @@ -208,7 +213,8 @@ reg_cldo3: cldo3 {
>  			reg_dcdca: dcdca {
>  				regulator-always-on;
>  				regulator-min-microvolt = <810000>;
> -				regulator-max-microvolt = <1080000>;
> +				regulator-max-microvolt = <1160000>;
> +				regulator-ramp-delay = <2500>;
>  				regulator-name = "vdd-cpu";
>  			};
>  
> @@ -216,6 +222,7 @@ reg_dcdcc: dcdcc {
>  				regulator-enable-ramp-delay = <32000>;
>  				regulator-min-microvolt = <810000>;
>  				regulator-max-microvolt = <1080000>;
> +				regulator-ramp-delay = <2500>;

This change is not related to CPU frequency scaling, so it belongs in a separate
patch (if it is needed).

Regards,
Samuel

>  				regulator-name = "vdd-gpu";
>  			};
>  
>