Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII;
 format=flowed
Content-Transfer-Encoding: 7bit
Date:   Tue, 03 May 2022 15:22:32 +0200
From:   Michael Walle <michael@walle.cc>
To:     Rob Herring <robh+dt@kernel.org>
Cc:     "David S . Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Horatiu Vultur <horatiu.vultur@microchip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        netdev <netdev@vger.kernel.org>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 1/2] dt-bindings: net: lan966x: remove PHY reset
In-Reply-To: <CAL_JsqKmgsErk41D8MBsQxLfmk16UYVu8+Z5SkwJ6W-obhtysQ@mail.gmail.com>
References: <20220428114049.1456382-1-michael@walle.cc>
 <20220428114049.1456382-2-michael@walle.cc>
 <CAL_JsqKmgsErk41D8MBsQxLfmk16UYVu8+Z5SkwJ6W-obhtysQ@mail.gmail.com>
User-Agent: Roundcube Webmail/1.4.13
Message-ID: <1b9e64238a5f70392f379560c884f72b@walle.cc>
Precedence: bulk

Am 2022-05-03 15:04, schrieb Rob Herring:
> On Thu, Apr 28, 2022 at 6:40 AM Michael Walle <michael@walle.cc> wrote:
>> 
>> The PHY reset was intended to be a phandle for a special PHY reset
>> driver for the integrated PHYs as well as any external PHYs. It turns
>> out, that the culprit is how the reset of the switch device is done.
>> In particular, the switch reset also affects other subsystems like
>> the GPIO and the SGPIO block and it happens to be the case that the
>> reset lines of the external PHYs are connected to a common GPIO line.
>> Thus as soon as the switch issues a reset during probe time, all the
>> external PHYs will go into reset because all the GPIO lines will
>> switch to input and the pull-down on that signal will take effect.
>> 
>> So even if there was a special PHY reset driver, it (1) won't fix
>> the root cause of the problem and (2) it won't fix all the other
>> consumers of GPIO lines which will also be reset.
>> 
>> It turns out, the Ocelot SoC has the same weird behavior (or the
>> lack of a dedicated switch reset) and there the problem is already
>> solved and all the bits and pieces are already there and this PHY
>> reset property isn't not needed at all.
>> 
>> There are no users of this binding. Just remove it.
> 
> Seems there was 1 user:
> 
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/net/microchip,lan966x-switch.example.dtb:
> switch@e0000000: resets: [[4294967295, 0], [4294967295, 0]] is too
> long
>  From schema:
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/net/microchip,lan966x-switch.example.dtb:
> switch@e0000000: reset-names: ['switch', 'phy'] is too long
>  From schema:
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
> 
> Please fix as this is now failing in linux-next.

Sorry. Should be fixed with
https://lore.kernel.org/netdev/20220503132038.2714128-1-michael@walle.cc/

-michael