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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s10-20020a056402520a00b00427b4ec9922si6493684edd.269.2022.05.03.09.22.58; Tue, 03 May 2022 09:23:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=uXir4gjh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234258AbiECKjS (ORCPT + 99 others); Tue, 3 May 2022 06:39:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234219AbiECKi4 (ORCPT ); Tue, 3 May 2022 06:38:56 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED70925EF; Tue, 3 May 2022 03:35:23 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 8FE2B6156C; Tue, 3 May 2022 10:35:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DF5DFC385A4; Tue, 3 May 2022 10:35:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651574123; bh=fb2jgnOf1kY2mxkxQhv8oSBItF0NeX+Q28mnAUhYiXc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=uXir4gjhcdyuzV1hBG6YLzfhHYSw85t6VT//XtO1srQ+WEZlcVQIEdatAREcezrbn z1HCD2SQipI+TwH7CJXsMTpJMNE3XB/ZpRY5SgLQCX0LV2O6nHbRFVAjEhQMrJDNVm lvUpdtKArggFJ/YpXFCfWibkXF9HyPdjS4moadMpepu4a9SK0x77rdwjxC5//rkq6Z tBF+5bdA5duv89W22RD1gSszM23izh2Dd2OrU8wG7k5MgqIltnpfW6mQGoNicPQaHK /SA/DEN224cRHG7hqbVECzqKLtZYsARjUk17fxs1bgzQViVzc7FPbxLHhlKGr/e7nV UA/xfF7730OIw== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nlpsF-008cat-BF; Tue, 03 May 2022 11:35:19 +0100 Date: Tue, 03 May 2022 11:35:19 +0100 Message-ID: <87ee1a9a54.wl-maz@kernel.org> From: Marc Zyngier To: Raghavendra Rao Ananta Cc: Andrew Jones , James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Catalin Marinas , Will Deacon , Peter Shier , Ricardo Koller , Oliver Upton , Reiji Watanabe , Jing Zhang , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Gavin Shan Subject: Re: [PATCH v7 1/9] KVM: arm64: Factor out firmware register handling from psci.c In-Reply-To: <20220502233853.1233742-2-rananta@google.com> References: <20220502233853.1233742-1-rananta@google.com> <20220502233853.1233742-2-rananta@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: rananta@google.com, drjones@redhat.com, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, pbonzini@redhat.com, catalin.marinas@arm.com, will@kernel.org, pshier@google.com, ricarkol@google.com, oupton@google.com, reijiw@google.com, jingzhangos@google.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, gshan@redhat.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 03 May 2022 00:38:45 +0100, Raghavendra Rao Ananta wrote: > > Common hypercall firmware register handing is currently employed > by psci.c. Since the upcoming patches add more of these registers, > it's better to move the generic handling to hypercall.c for a > cleaner presentation. > > While we are at it, collect all the firmware registers under > fw_reg_ids[] to help implement kvm_arm_get_fw_num_regs() and > kvm_arm_copy_fw_reg_indices() in a generic way. Also, define > KVM_REG_FEATURE_LEVEL_MASK using a GENMASK instead. Yup. See below though. > > No functional change intended. > > Signed-off-by: Raghavendra Rao Ananta > Reviewed-by: Oliver Upton > Reviewed-by: Gavin Shan > --- > arch/arm64/kvm/guest.c | 2 +- > arch/arm64/kvm/hypercalls.c | 185 +++++++++++++++++++++++++++++++++++ > arch/arm64/kvm/psci.c | 183 ---------------------------------- > include/kvm/arm_hypercalls.h | 7 ++ > include/kvm/arm_psci.h | 7 -- > 5 files changed, 193 insertions(+), 191 deletions(-) > > diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c > index 7e15b03fbdf8..0d5cca56cbda 100644 > --- a/arch/arm64/kvm/guest.c > +++ b/arch/arm64/kvm/guest.c > @@ -18,7 +18,7 @@ > #include > #include > #include > -#include > +#include > #include > #include > #include > diff --git a/arch/arm64/kvm/hypercalls.c b/arch/arm64/kvm/hypercalls.c > index 202b8c455724..fa6d9378d8e7 100644 > --- a/arch/arm64/kvm/hypercalls.c > +++ b/arch/arm64/kvm/hypercalls.c > @@ -158,3 +158,188 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) > smccc_set_retval(vcpu, val[0], val[1], val[2], val[3]); > return 1; > } > + > +static const u64 kvm_arm_fw_reg_ids[] = { > + KVM_REG_ARM_PSCI_VERSION, > + KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, > + KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, > + KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, > +}; > + > +int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu) > +{ > + return ARRAY_SIZE(kvm_arm_fw_reg_ids); > +} > + > +int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) > +{ > + int i; > + > + for (i = 0; i < ARRAY_SIZE(kvm_arm_fw_reg_ids); i++) { > + if (put_user(kvm_arm_fw_reg_ids[i], uindices++)) > + return -EFAULT; > + } > + > + return 0; > +} > + > +#define KVM_REG_FEATURE_LEVEL_WIDTH 4 > +#define KVM_REG_FEATURE_LEVEL_MASK GENMASK(KVM_REG_FEATURE_LEVEL_WIDTH, 0) which translates in GENMASK(4, 0), which is 5 bit wide. Not what you want. Thanks, M. -- Without deviation from the norm, progress is not possible.