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[2620:137:e000::1:20]) by mx.google.com with ESMTP id lj23-20020a170906f9d700b006e8747fd555si16232542ejb.550.2022.05.04.00.52.59; Wed, 04 May 2022 00:53:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@alliedtelesis.co.nz header.s=mail181024 header.b=ThOT6R5C; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=alliedtelesis.co.nz Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344632AbiEDEuL (ORCPT + 99 others); Wed, 4 May 2022 00:50:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344197AbiEDEuF (ORCPT ); Wed, 4 May 2022 00:50:05 -0400 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [IPv6:2001:df5:b000:5::4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 61B012AC6F for ; Tue, 3 May 2022 21:46:29 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 23F662C019D; Wed, 4 May 2022 04:46:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1651639587; bh=Pmufax0St8BEaWLKnKyOVAZIs8TS9n0DOOyRR5B/d8g=; h=From:To:Cc:Subject:Date:From; b=ThOT6R5CCnqcyH8L2DloqzV6zPOXqWaWjVt6VRMin3WzsuU4EjB8RpMATAxc0BIGQ THmuh8VPGCWddgqn5HhWkDKCOKhDow2GDEQLD+mZ9IwfugaYOMYjVg5sUwFW+dI6po /YtzYQk8r89DGquddCcRnMTHgZq8al7fhwCNOPXCLekcrUxodQU7uj2eEgmJS0pYtY wdx37cqXzxNoLDYjfbhNgin0raEIUy0/4XE77EOf8VGNIcuuPjlM21+ECZNAVpSGb9 2e6VzPxjQy2jxE6zPzge4ioPbd2SpnmkKxINSnI2b0cqtKDWc98IBcNnZgPGh1tOIz cjNPS2CVnJV4A== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Wed, 04 May 2022 16:46:26 +1200 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id E439613ED63; Wed, 4 May 2022 16:46:26 +1200 (NZST) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id DEBA12A1FA9; Wed, 4 May 2022 16:46:26 +1200 (NZST) From: Chris Packham To: catalin.marinas@arm.com, will@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, kostap@marvell.com, robert.marko@sartura.hr Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Chris Packham Subject: [PATCH v5 0/2] arm64: mvebu: Support for Marvell 98DX2530 (and variants) Date: Wed, 4 May 2022 16:46:22 +1200 Message-Id: <20220504044624.951841-1-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.36.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SEG-SpamProfiler-Analysis: v=2.3 cv=C7GXNjH+ c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=oZkIemNP1mAA:10 a=1gLZ1RiacOvl1JNmVH8A:9 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds support for the Marvell 98DX2530 SoC which is the Contro= l and Management CPU integrated into the AlleyCat5/AlleyCat5X series of Marvell switches. The CPU core is an ARM Cortex-A55 with neon, simd and crypto extensions. This is fairly similar to the Armada-3700 SoC so most of the required peripherals are already supported. This series adds a devicetree and pinc= trl driver for the SoC and the RD-AC5X-32G16HVG6HLG reference board. The pinctrl changes from v4 have been picked up and are in linux-next so = I haven't included them in this round. That leaves just the dts files and a= minor Kconfig update for arm64. Chris Packham (2): arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board arm64: marvell: enable the 98DX2530 pinctrl driver arch/arm64/Kconfig.platforms | 2 + arch/arm64/boot/dts/marvell/Makefile | 1 + .../boot/dts/marvell/armada-98dx2530.dtsi | 310 ++++++++++++++++++ arch/arm64/boot/dts/marvell/rd-ac5x.dts | 90 +++++ 4 files changed, 403 insertions(+) create mode 100644 arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi create mode 100644 arch/arm64/boot/dts/marvell/rd-ac5x.dts --=20 2.36.0