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Date:   Wed, 4 May 2022 10:02:01 -0500
From:   Rob Herring <robh@kernel.org>
To:     Taniya Das <quic_tdas@quicinc.com>
Cc:     Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette =?iso-8859-1?Q?=A0?= 
        <mturquette@baylibre.com>, Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org
Subject: Re: [PATCH v1 1/3] dt-bindings: clock: Add resets for LPASS audio
 clock controller for SC7280
Message-ID: <YnKVaXqHOSM9PByW@robh.at.kernel.org>
References: <20220503164635.23876-1-quic_tdas@quicinc.com>
 <20220503164635.23876-2-quic_tdas@quicinc.com>
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On Tue, May 03, 2022 at 10:16:33PM +0530, Taniya Das wrote:
> Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
> for SC7280. Update reg property min/max items in YAML schema.
> 
> Fixes: 57405b795504 ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280").
> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
> ---
>  .../bindings/clock/qcom,sc7280-lpasscorecc.yaml        | 10 ++++++++--
>  include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h   |  5 +++++
>  2 files changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
> index bad9135489de..f74d9c1cb11d 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
> @@ -38,8 +38,12 @@ properties:
>    '#power-domain-cells':
>      const: 1
> 
> +  '#reset-cells':
> +    const: 1
> +
>    reg:
> -    maxItems: 1
> +    minItems: 1
> +    maxItems: 2

When more than 1, you need to define what each entry is.

> 
>  required:
>    - compatible
> @@ -116,13 +120,15 @@ examples:
>      #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
>      lpass_audiocc: clock-controller@3300000 {
>        compatible = "qcom,sc7280-lpassaudiocc";
> -      reg = <0x3300000 0x30000>;
> +      reg = <0x3300000 0x30000>,
> +            <0x32a9000 0x1000>;
>        clocks = <&rpmhcc RPMH_CXO_CLK>,
>                 <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
>        clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
>        power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
>        #clock-cells = <1>;
>        #power-domain-cells = <1>;
> +      #reset-cells = <1>;
>      };
> 
>    - |
> diff --git a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
> index 20ef2ea673f3..22dcd47d4513 100644
> --- a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
> +++ b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
> @@ -24,6 +24,11 @@
>  #define LPASS_AUDIO_CC_RX_MCLK_CLK			14
>  #define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC			15
> 
> +/* LPASS AUDIO CC CSR */
> +#define LPASS_AUDIO_SWR_RX_CGCR				0
> +#define LPASS_AUDIO_SWR_TX_CGCR				1
> +#define LPASS_AUDIO_SWR_WSA_CGCR			2
> +
>  /* LPASS_AON_CC clocks */
>  #define LPASS_AON_CC_PLL				0
>  #define LPASS_AON_CC_PLL_OUT_EVEN			1
> --
> 2.17.1
> 
>