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Wed, 04 May 2022 15:31:08 -0700 (PDT) Received: from localhost ([2620:15c:202:201:827b:7f14:bb7e:2898]) by smtp.gmail.com with UTF8SMTPSA id i9-20020aa79089000000b0050dc76281ffsm8617857pfa.217.2022.05.04.15.31.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 May 2022 15:31:08 -0700 (PDT) Date: Wed, 4 May 2022 15:31:07 -0700 From: Matthias Kaehlcke To: Srinivasa Rao Mandadapu Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_rohkumar@quicinc.com, srinivas.kandagatla@linaro.org, dianders@chromium.org, swboyd@chromium.org, judyhsiao@chromium.org, Venkata Prasad Potturu Subject: Re: [PATCH v13 4/4] arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1 Message-ID: References: <1651662987-11704-1-git-send-email-quic_srivasam@quicinc.com> <1651662987-11704-5-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1651662987-11704-5-git-send-email-quic_srivasam@quicinc.com> X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 04, 2022 at 04:46:27PM +0530, Srinivasa Rao Mandadapu wrote: > Add LPASS LPI pinctrl properties, which are required for Audio > functionality on herobrine based platforms of rev5+ > (aka CRD 3.0/3.1) boards. > > Signed-off-by: Srinivasa Rao Mandadapu > Co-developed-by: Venkata Prasad Potturu > Signed-off-by: Venkata Prasad Potturu > --- > arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 63 +++++++++++++++++++++++ > 1 file changed, 63 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts > index deaea3a..dc61bad 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts > @@ -110,6 +110,69 @@ ap_ts_pen_1v8: &i2c13 { > * - If a pin is totally internal to Qcard then it gets Qcard name. > * - If a pin is not hooked up on Qcard, it gets no name. > */ > +&lpass_dmic01_clk { > + drive-strength = <8>; > + bias-disable; > +}; > + > +&lpass_dmic01_data { > + bias-pull-down; > +}; > + > +&lpass_dmic01_clk_sleep { > + drive-strength = <2>; > +}; should be after 'lpass_dmic01_clk' > + > +&lpass_dmic23_clk { > + drive-strength = <8>; > + bias-disable; > +}; > + > +&lpass_dmic23_data { > + bias-pull-down; > +}; > + > +&lpass_dmic23_clk_sleep { > + drive-strength = <2>; > +}; see above > + > +&lpass_rx_swr_clk { > + drive-strength = <2>; > + slew-rate = <1>; > + bias-disable; > +}; > + > +&lpass_rx_swr_data { > + drive-strength = <2>; > + slew-rate = <1>; > + bias-bus-hold; > +}; > + > +&lpass_rx_swr_clk_sleep { > + drive-strength = <2>; drive strengh is the same as for 'lpass_rx_swr_clk', can be omitted? > + bias-pull-down; > +}; see 'lpass_dmic23_clk_sleep' > + > +&lpass_rx_swr_data_sleep { > + drive-strength = <2>; is drive strength really needed here? > + bias-pull-down; > +}; > + > +&lpass_tx_swr_clk { > + drive-strength = <2>; > + slew-rate = <1>; > + bias-disable; > +}; > + > +&lpass_tx_swr_data { > + slew-rate = <1>; > + bias-bus-hold; > +}; > + > +&lpass_tx_swr_clk_sleep { > + drive-strength = <2>; is drive strength really needed here? > + bias-pull-down; > +}; see 'lpass_dmic23_clk_sleep' > > &mi2s1_data0 { > drive-strength = <6>; > -- > 2.7.4 >