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[2620:137:e000::1:20]) by mx.google.com with ESMTP id lr11-20020a17090b4b8b00b001dbf264c057si10259318pjb.111.2022.05.05.21.50.06; Thu, 05 May 2022 21:50:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel-com.20210112.gappssmtp.com header.s=20210112 header.b="iWb/KiI5"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380299AbiEEN4L (ORCPT + 99 others); Thu, 5 May 2022 09:56:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1380343AbiEENze (ORCPT ); Thu, 5 May 2022 09:55:34 -0400 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E7E459325 for ; Thu, 5 May 2022 06:51:31 -0700 (PDT) Received: by mail-pf1-x42d.google.com with SMTP id j6so3676430pfe.13 for ; Thu, 05 May 2022 06:51:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=oIH9/l+jKgs9B5DRYw7FbS58vVe4zVtylGwe2TjrN9M=; b=iWb/KiI5Nh4F/zht1nOaD5nXxGZBVUw70MvhbB/MJ6c+5LPqpREBzsf6zsAQsrRDm8 rx/RYqOl+t8yV2aaX7MVFWaZvRX9f5nKsomJH2A+eg3KYprH4WqxwzJSyMckr3iJaKXk JiCQBoCdirntvgQwkNUj81coh+byvO158gtCySbTKTu7QRCz3MZhlApdPH//ifXBchv0 UvitkHWl28bD8tdx70HEP8vaf9H3st3Uu54CmlDnMyBi7D2FUbHJQVrUAG71YMXAoyw8 GcDd05HWhgN9qLBr6esb2aJMpkMvKgXc/DFPVtmeJ6Fnr1DS5S6T0cBS3lXFfjEVmAnn Zh/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=oIH9/l+jKgs9B5DRYw7FbS58vVe4zVtylGwe2TjrN9M=; b=BvQgHn7lAvFLTk5e9yMwoBydHCXwKIwpzZz30u63GGLTpvKAhai2U8C5NevFsyqwaI +9tEV+BvOU6p59ZXpgJ0Fpq07T7zQRk6ggqTxWkXr5EXumuBMgyMXyI9ga1LXWoeghbe uXKRVdaEV9YgOhaNB6G01eQJ+rEqqr4BO0prfxHuxPwWWajls6r/jYQvRBmTFcaxqrQ9 UVdhu37/R0U7AZcnk5LgX/MsC4T1O9jb3QGCwnrko4y08fNd5JiLEWGNfVkw5kAt6goo /sHik6vBmJbLhDRXgta+YRSj1pyPFTJ+0L1lOPC3L+oGg+KavcSp7KCDvxj3xEIhATIA H0yA== X-Gm-Message-State: AOAM531qNMnHKUvSwZof9gTXQDDMOt19B//1ADaLXszHUuViLboimDNp WDDYgTdVa4t0Vjzoc4Cw+0B8cSaZ/ePJwRCaWYiV9g== X-Received: by 2002:a05:6a02:283:b0:342:703e:1434 with SMTP id bk3-20020a056a02028300b00342703e1434mr21850337pgb.74.1651758691003; Thu, 05 May 2022 06:51:31 -0700 (PDT) MIME-Version: 1.0 References: <522e37eb-68fc-35db-44d5-479d0088e43f@intel.com> <9b388f54f13b34fe684ef77603fc878952e48f87.camel@intel.com> <664f8adeb56ba61774f3c845041f016c54e0f96e.camel@intel.com> <1b681365-ef98-ec78-96dc-04e28316cf0e@intel.com> <8bf596b45f68363134f431bcc550e16a9a231b80.camel@intel.com> <6bb89ca6e7346f4334f06ea293f29fd12df70fe4.camel@intel.com> In-Reply-To: <6bb89ca6e7346f4334f06ea293f29fd12df70fe4.camel@intel.com> From: Dan Williams Date: Thu, 5 May 2022 06:51:20 -0700 Message-ID: Subject: Re: [PATCH v3 00/21] TDX host kernel support To: Kai Huang Cc: Dave Hansen , Linux Kernel Mailing List , KVM list , Sean Christopherson , Paolo Bonzini , "Brown, Len" , "Luck, Tony" , Rafael J Wysocki , Reinette Chatre , Peter Zijlstra , Andi Kleen , "Kirill A. Shutemov" , Kuppuswamy Sathyanarayanan , Isaku Yamahata , Mike Rapoport Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [ add Mike ] On Thu, May 5, 2022 at 2:54 AM Kai Huang wrote: [..] > > Hi Dave, > > Sorry to ping (trying to close this). > > Given we don't need to consider kmem-hot-add legacy PMEM after TDX module > initialization, I think for now it's totally fine to exclude legacy PMEMs from > TDMRs. The worst case is when someone tries to use them as TD guest backend > directly, the TD will fail to create. IMO it's acceptable, as it is supposedly > that no one should just use some random backend to run TD. The platform will already do this, right? I don't understand why this is trying to take proactive action versus documenting the error conditions and steps someone needs to take to avoid unconvertible memory. There is already the CONFIG_HMEM_REPORTING that describes relative performance properties between initiators and targets, it seems fitting to also add security properties between initiators and targets so someone can enumerate the numa-mempolicy that avoids unconvertible memory. No, special casing in hotplug code paths needed. > > I think w/o needing to include legacy PMEM, it's better to get all TDX memory > blocks based on memblock, but not e820. The pages managed by page allocator are > from memblock anyway (w/o those from memory hotplug). > > And I also think it makes more sense to introduce 'tdx_memblock' and > 'tdx_memory' data structures to gather all TDX memory blocks during boot when > memblock is still alive. When TDX module is initialized during runtime, TDMRs > can be created based on the 'struct tdx_memory' which contains all TDX memory > blocks we gathered based on memblock during boot. This is also more flexible to > support other TDX memory from other sources such as CLX memory in the future. > > Please let me know if you have any objection? Thanks! It's already the case that x86 maintains sideband structures to preserve memory after exiting the early memblock code. Mike, correct me if I am wrong, but adding more is less desirable than just keeping the memblock around?