Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp3385686iob; Sat, 7 May 2022 03:58:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyL0VElG/RpZ/1xs4CQiNWG3C8jRxQttXw3Y1YeboiitQZxmtOqsvlFt6KGJ2b69ti4LHAq X-Received: by 2002:a17:90b:1d83:b0:1dc:4362:61bd with SMTP id pf3-20020a17090b1d8300b001dc436261bdmr17215494pjb.126.1651921116890; Sat, 07 May 2022 03:58:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1651921116; cv=none; d=google.com; s=arc-20160816; b=MnxccISfGavxfDALgRsxEyjEh95toLoSMFcBO6IYMZ3oam/os6zdZAXq2CSW43yKEX QgEbVWjMXOOeFFbEdP8uPVejQs4gdpxU3ojyDS1Z90MbWzm0AxyyFwiQcTzmI9HXqd9y ltI0+9LLobNd9dyBw3djbjWgYuS/sQL++1jMhmZtc6RvVxn2PccsX1cQjF5AhWuKfU+W FP15kmxKUe7jSWXNhE60V9P3FF/eQsHGGSjGihnPdgens2UKTfQUIHyooLOihJhPc+Hb nWrJR9gPnbijtMzEDkh8EkPany/LMeu5sMREfzzKny8bexCe7ZvGEn82VH/MSNPLrg27 D/cQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=dDn0aaATEgqD40gC1i3cyfAokSqe0OOfUVESCtCxQOs=; b=hysd1rBhtnZWcxvk4sp6j3id4FIMM2ReJP0P34SsdSlGFDdEPVYSqka+gckGVOVt/6 jC61wtN0BNIxYh/+zBXYrBoap1POF+OTBd6S7FhdwkMXsEyB0aq8FSib009HcgFPKo50 GtqJf7caQp1oMONA1W9u4A0iHOeGD7IxY6N4zCA+CLWx/Q3zkLloBI9F4v8eARijd628 PVMRM5sC8R912TLfPtyfEdWm5s/Wi8RmxkxY3ZRi0iiOPtI5/0QO/piMUuVbpExEmkzV Jox/Ft3fozQEOsdbYlnZHh9iPqaDYLbYn5x+WMLZX2dj2l5sJJXrRbbQrSjMD3YTSKzq pd8Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=ihtcdYxJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ip1-20020a17090b314100b001d95ddb8819si8255397pjb.4.2022.05.07.03.58.16; Sat, 07 May 2022 03:58:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=ihtcdYxJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1384898AbiEESaC (ORCPT + 99 others); Thu, 5 May 2022 14:30:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383378AbiEESTx (ORCPT ); Thu, 5 May 2022 14:19:53 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F4064393D5; Thu, 5 May 2022 11:16:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651774568; x=1683310568; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vQdc+7bMp85r+RLxtRflm+8G7MwPp5BRnYdgKX7piSg=; b=ihtcdYxJjLJLDjYNIoIYDsHVArbnCA+hoyDvulDoQPCIuJHfdOfaBiWY aO20QgT7l+9UmOQtnB+6h3t5iZn82Z2aSnS5V5AfxX6ORQgJU4YykdV5Q cWtXofLlgGfwymtXlml5nknYNpXytUtvK0sKiI+enJyopiw09wXfN1mYL 3Czc2m4IpH7CPQPr2ioXLQczxMDZfUdkj6Bxl/G+qYsVQvDXJTgBebhgM 5GufE4IGfxp3dU1DbFmmxrTzxPSvyBafolz/hNRSY1PEsyM2zH1rUU9db uNOrv+mVXyhSmdLFP6hwOeE6RQ3swSJe6fJsxQL9SbHlih7eYBgS2WWna g==; X-IronPort-AV: E=McAfee;i="6400,9594,10338"; a="268354864" X-IronPort-AV: E=Sophos;i="5.91,202,1647327600"; d="scan'208";a="268354864" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 May 2022 11:15:50 -0700 X-IronPort-AV: E=Sophos;i="5.91,202,1647327600"; d="scan'208";a="665083384" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 May 2022 11:15:50 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar Subject: [RFC PATCH v6 067/104] KVM: TDX: restore host xsave state when exit from the guest TD Date: Thu, 5 May 2022 11:15:01 -0700 Message-Id: <547fe194bc6eccfe7ddb23e68065b36a58d64758.1651774250.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Isaku Yamahata On exiting from the guest TD, xsave state is clobbered. Restore xsave state on TD exit. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/vmx/tdx.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index 1aa52a093764..a54ee22b6c64 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -2,6 +2,7 @@ #include #include +#include #include #include "capabilities.h" @@ -590,6 +591,22 @@ void tdx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) vcpu->kvm->vm_bugged = true; } +static void tdx_restore_host_xsave_state(struct kvm_vcpu *vcpu) +{ + struct kvm_tdx *kvm_tdx = to_kvm_tdx(vcpu->kvm); + + if (static_cpu_has(X86_FEATURE_XSAVE) && + host_xcr0 != (kvm_tdx->xfam & supported_xcr0)) + xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0); + if (static_cpu_has(X86_FEATURE_XSAVES) && + /* PT can be exposed to TD guest regardless of KVM's XSS support */ + host_xss != (kvm_tdx->xfam & (supported_xss | XFEATURE_MASK_PT))) + wrmsrl(MSR_IA32_XSS, host_xss); + if (static_cpu_has(X86_FEATURE_PKU) && + (kvm_tdx->xfam & XFEATURE_MASK_PKRU)) + write_pkru(vcpu->arch.host_pkru); +} + u64 __tdx_vcpu_run(hpa_t tdvpr, void *regs, u32 regs_mask); static noinstr void tdx_vcpu_enter_exit(struct kvm_vcpu *vcpu, @@ -613,6 +630,7 @@ fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu) tdx_vcpu_enter_exit(vcpu, tdx); + tdx_restore_host_xsave_state(vcpu); tdx->host_state_need_restore = true; vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET; -- 2.25.1