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From:   zhenwei pi <pizhenwei@bytedance.com>
To:     kbusch@kernel.org, hch@lst.de
Cc:     sagi@grimberg.me, axboe@fb.com, linux-nvme@lists.infradead.org,
        linux-kernel@vger.kernel.org, zhenwei pi <pizhenwei@bytedance.com>
Subject: [PATCH 2/3] nvme: introduce smart bits of aen cfg
Date:   Sat,  7 May 2022 14:50:25 +0800
Message-Id: <20220507065026.260306-3-pizhenwei@bytedance.com>
In-Reply-To: <20220507065026.260306-1-pizhenwei@bytedance.com>
References: <20220507065026.260306-1-pizhenwei@bytedance.com>
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According to NVM Express v1.4, Section 5.21.1.11 (Asynchronous Event
Configuration), introduce bit 0 ~ bit 5.

Signed-off-by: zhenwei pi <pizhenwei@bytedance.com>
---
 include/linux/nvme.h | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 882ad7523127..e9f1563ab878 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -688,10 +688,21 @@ enum {
 };
 
 enum {
-	NVME_AEN_CFG_NS_ATTR		= 1 << NVME_AEN_BIT_NS_ATTR,
-	NVME_AEN_CFG_FW_ACT		= 1 << NVME_AEN_BIT_FW_ACT,
-	NVME_AEN_CFG_ANA_CHANGE		= 1 << NVME_AEN_BIT_ANA_CHANGE,
-	NVME_AEN_CFG_DISC_CHANGE	= 1 << NVME_AEN_BIT_DISC_CHANGE,
+	/*
+	 * NVMe SPEC 1.4: 5.21.1.11 Asynchronous Event Configuration
+	 * bits 07:00: SMART / Health Critical Warnings
+	 */
+	NVME_AEN_CFG_SMART_CRIT_SPARE		= NVME_SMART_CRIT_SPARE,
+	NVME_AEN_CFG_SMART_CRIT_TEMPERATURE	= NVME_SMART_CRIT_TEMPERATURE,
+	NVME_AEN_CFG_SMART_CRIT_RELIABILITY	= NVME_SMART_CRIT_RELIABILITY,
+	NVME_AEN_CFG_SMART_CRIT_MEDIA		= NVME_SMART_CRIT_MEDIA,
+	NVME_AEN_CFG_SMART_CRIT_VOLATILE_MEMORY	= NVME_SMART_CRIT_VOLATILE_MEMORY,
+	NVME_AEN_CFG_SMART_CRIT_PMR_UNRELIABLE	= NVME_SMART_CRIT_PMR_UNRELIABLE,
+
+	NVME_AEN_CFG_NS_ATTR			= 1 << NVME_AEN_BIT_NS_ATTR,
+	NVME_AEN_CFG_FW_ACT			= 1 << NVME_AEN_BIT_FW_ACT,
+	NVME_AEN_CFG_ANA_CHANGE			= 1 << NVME_AEN_BIT_ANA_CHANGE,
+	NVME_AEN_CFG_DISC_CHANGE		= 1 << NVME_AEN_BIT_DISC_CHANGE,
 };
 
 struct nvme_lba_range_type {
-- 
2.20.1