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Date:   Thu, 5 May 2022 23:12:50 +0800
From:   Leo Yan <leo.yan@linaro.org>
To:     German Gomez <german.gomez@arm.com>
Cc:     Ali Saidi <alisaidi@amazon.com>, linux-kernel@vger.kernel.org,
        linux-perf-users@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, acme@kernel.org,
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        james.clark@arm.com, john.garry@huawei.com, jolsa@kernel.org,
        kjain@linux.ibm.com, lihuafei1@huawei.com, mark.rutland@arm.com,
        mathieu.poirier@linaro.org, mingo@redhat.com, namhyung@kernel.org,
        peterz@infradead.org, will@kernel.org
Subject: Re: [PATCH v7 5/5] perf arm-spe: Use SPE data source for neoverse
 cores
Message-ID: <20220505151250.GC136333@leoy-ThinkPad-X240s>
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 <458a2de1-dc93-7e2d-5dc5-fbcd670572b6@arm.com>
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On Tue, May 03, 2022 at 10:58:15AM +0100, German Gomez wrote:

[...]

> > +static void arm_spe__synth_data_source_generic(const struct arm_spe_record *record,
> > +					       union perf_mem_data_src *data_src)
> > +{
> >  	if (record->type & (ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS)) {
> > -		data_src.mem_lvl = PERF_MEM_LVL_L3;
> > +		data_src->mem_lvl = PERF_MEM_LVL_L3;
> 
> Thanks for addressing my previous comment about filling both mem_lvl and mem_lvl_num.
> 
> I wonder if it's also worth updating for the non-Neoverse cores as well while we're at it. I'll let Leo decide since this patchset is only focused on Neoverse.

Thanks for pointing out this.  Yeah, Let's use this patch set for
enabling Neoverse data source.

We can use a new patch to updating cache level for non-Neoverse cores
(it's better also set store cache level as LVL_NA for non-Neoverse cores).

Thanks,
Leo