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Date:   Thu, 5 May 2022 17:48:02 -0700
From:   Matthias Kaehlcke <mka@chromium.org>
To:     Douglas Anderson <dianders@chromium.org>
Cc:     Bjorn Andersson <bjorn.andersson@linaro.org>, swboyd@chromium.org,
        Andy Gross <agross@kernel.org>,
        Krzysztof Kozlowski <krzk+dt@kernel.org>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sc7280: Set SPI flash to 50 MHz for
 herobrine boards
Message-ID: <YnRwQglUz9R61ZG/@google.com>
References: <20220505161425.1.Icf6f3796d2fa122b4c0566d9317b461bfbc24b7f@changeid>
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On Thu, May 05, 2022 at 04:14:30PM -0700, Douglas Anderson wrote:
> sc7280-herobrine based boards are specced to be able to access their
> SPI flash at 50 MHz with the drive strength of the pins set at 8. The
> drive strength is already set to 8 in "sc7280-herobrine.dtsi", so
> let's bump up the clock. The matching firmware change for this is at:
> 
> https://review.coreboot.org/c/coreboot/+/63948
> 
> NOTE: the firmware change isn't _required_ to make the kernel work at
> 50 MHz, it merely shows that the boards are known to work fine at 50
> MHz.
> 
> ALSO NOTE: this doesn't update the "sc7280-chrome-common.dtsi" file
> which is used by both herobrine boards and IDP. At the moment the IDP
> boards aren't configuring a drive strength of 8 and it seems safer to
> just leave them at the slower speed if they're already working.
> 
> Signed-off-by: Douglas Anderson <dianders@chromium.org>

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>