Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp4723936iob; Sun, 8 May 2022 23:19:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw+ne2dUlhCZBwZJffFZi3O8vcGwx9KeHbrG72DEa42vUKT7BYJG2aAQi2ezlNdxOjhPu4M X-Received: by 2002:a65:4c0c:0:b0:3c1:5bb1:6701 with SMTP id u12-20020a654c0c000000b003c15bb16701mr12110249pgq.136.1652077190238; Sun, 08 May 2022 23:19:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652077190; cv=none; d=google.com; s=arc-20160816; b=nqdofSTdiDCfWgfuKuF7DL2G41G+Bvtn+j0MWVbXYf0J60/SCm61t9RO24PbWz9C5h 6qlt4qyDXic9vORWGOhm1RhWaCP1t8O79IYeG9XF0WxNIf16RkZ5scM0sbW+UTm3QfPA Ekrw79kcoio3CgsVrdAZeRWR9YY1OnvCeyBVc/24A/X5ir4s9xEQt0Lqqek2tTbPKhqu SQfASPCJfSGrio0S6buAHQYhL4ukq/TD1oqCM0DBUc7BjxSXt6txWlXkYoy5ESm00Ys6 PqWxyIlf8wSp5w7Ila14Q8Lkz1o4HZzWkCnbPYEmYDVKCOODpp74Pl3swucjsFcsOcNz 4c3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=wP+yhgO9708LV/mXAnbEvaVQwS2jYiUd7rRm1lrxg8Y=; b=TTu7hNPVRTvGvpDLJEItTdvCvoh/ABwysdnYPnckIkmRkSrEiOzv1ne9w7E7VmBpWo Yuc6mV+G0HQc/v8Ih5Iyc3Cp8l4GMwkkOj4xvgX4FlMqWJDGwg2mE+Brv5+e+YHMVP7a iPbmxLdR8VdjlSSwFX7S46+fJHZECpHg/UDrR7Kz6XGikKlEDMCQiXwp6SwlimH/Mw1z kY1kvL05oGv3NCg7Rtc8oQT5H1Bk7cRfIfG7jIDv8ZJjnd/rYJox8X+UdE9G+ri4WI2M yXcK0CIgKD4xS2VXh1AFKCSvz0Hg8vV8GjuPvh0YcNQ6tMHZGyxrJiZ5S6323K+309Mp e5dA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=c3i7JN4a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [2620:137:e000::1:18]) by mx.google.com with ESMTPS id z3-20020a170903018300b00153b2d16631si10021309plg.569.2022.05.08.23.19.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 May 2022 23:19:50 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=c3i7JN4a; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 14A4D134E09; Sun, 8 May 2022 23:16:47 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236239AbiEEBuB (ORCPT + 99 others); Wed, 4 May 2022 21:50:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235887AbiEEBt7 (ORCPT ); Wed, 4 May 2022 21:49:59 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1FEB71037; Wed, 4 May 2022 18:46:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=wP+yhgO9708LV/mXAnbEvaVQwS2jYiUd7rRm1lrxg8Y=; b=c3i7JN4a/FesuLyUv7OQZKmrhQ S0LkNjERj2/FAuFAk0mTXrwwoFgFVvi+45TGstGLZjzQkqrhMsrcNDIQmMbEAtfeH1VjKeFyLnj+f 5z58Xkt+oEABagxvSmNjEA/n8+6zsDb89oBFE51d8rEAqi1WYZlyXzqgJm6RwUrkigmQ=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1nmQZJ-001Hz6-Bw; Thu, 05 May 2022 03:46:13 +0200 Date: Thu, 5 May 2022 03:46:13 +0200 From: Andrew Lunn To: Ansuel Smith Cc: Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Jonathan Corbet , Pavel Machek , John Crispin , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-leds@vger.kernel.org Subject: Re: [RFC PATCH v6 10/11] net: dsa: qca8k: add LEDs support Message-ID: References: <20220503151633.18760-1-ansuelsmth@gmail.com> <20220503151633.18760-11-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220503151633.18760-11-ansuelsmth@gmail.com> X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +config NET_DSA_QCA8K_LEDS_SUPPORT > + tristate "Qualcomm Atheros QCA8K Ethernet switch family LEDs support" > + select NET_DSA_QCA8K The should be a depends, not a select. It will then become visible when the NET_DSA_QCA8K directly above it is enabled. > + select LEDS_OFFLOAD_TRIGGERS and this should also be a depends. If the LED core does not have support, the QCA8K driver should not enable its support. > +static int > +qca8k_parse_netdev(unsigned long rules, u32 *offload_trigger, u32 *mask) > +{ > + /* Parsing specific to netdev trigger */ > + if (test_bit(TRIGGER_NETDEV_LINK, &rules)) > + *offload_trigger = QCA8K_LED_LINK_10M_EN_MASK | > + QCA8K_LED_LINK_100M_EN_MASK | > + QCA8K_LED_LINK_1000M_EN_MASK; > + if (test_bit(TRIGGER_NETDEV_LINK_10, &rules)) > + *offload_trigger = QCA8K_LED_LINK_10M_EN_MASK; > + if (test_bit(TRIGGER_NETDEV_LINK_100, &rules)) > + *offload_trigger = QCA8K_LED_LINK_100M_EN_MASK; > + if (test_bit(TRIGGER_NETDEV_LINK_1000, &rules)) > + *offload_trigger = QCA8K_LED_LINK_1000M_EN_MASK; > + if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &rules)) > + *offload_trigger = QCA8K_LED_HALF_DUPLEX_MASK; > + if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &rules)) > + *offload_trigger = QCA8K_LED_FULL_DUPLEX_MASK; > + if (test_bit(TRIGGER_NETDEV_TX, &rules)) > + *offload_trigger = QCA8K_LED_TX_BLINK_MASK; > + if (test_bit(TRIGGER_NETDEV_RX, &rules)) > + *offload_trigger = QCA8K_LED_RX_BLINK_MASK; > + if (test_bit(TRIGGER_NETDEV_BLINK_2HZ, &rules)) > + *offload_trigger = QCA8K_LED_BLINK_2HZ; > + if (test_bit(TRIGGER_NETDEV_BLINK_4HZ, &rules)) > + *offload_trigger = QCA8K_LED_BLINK_4HZ; > + if (test_bit(TRIGGER_NETDEV_BLINK_8HZ, &rules)) > + *offload_trigger = QCA8K_LED_BLINK_8HZ; > + > + pr_info("OFFLOAD TRIGGER %x\n", *offload_trigger); leftover debug print. Andrew