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Message-ID: <427a8277-49f0-4317-d6c3-4a15d7070e55@igalia.com>
Date:   Wed, 4 May 2022 17:00:42 -0300
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To:     Catalin Marinas <catalin.marinas@arm.com>,
        will Deacon <will@kernel.org>,
        "Michael Kelley (LINUX)" <mikelley@microsoft.com>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Marc Zyngier <maz@kernel.org>, mark.rutland@arm.com,
        Russell King <linux@armlinux.org.uk>,
        Ard Biesheuvel <ardb@kernel.org>, broonie@kernel.org
Cc:     "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        "linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>
From:   "Guilherme G. Piccoli" <gpiccoli@igalia.com>
Subject: Should arm64 have a custom crash shutdown handler?
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Hi folks, this email is to ask feedback / trigger a discussion about the
concept of custom crash shutdown handler, that is "missing" in arm64
while it's present in many architectures [mips, powerpc, x86, sh (!)].

Currently, when we kexec in arm64, the function machine_crash_shutdown()
is called as a handler to disable CPUs and (potentially) do extra
quiesce work. In the aforementioned architectures, there's a way to
override this function, if for example an hypervisor wish to have its
guests running their own custom shutdown machinery.

For powerpc/mips, the approach is a generic shutdown function that might
call other handler-registered functions, whereas x86/sh relies in the
"machine_ops" structure, having the crash shutdown as a callback in such
struct.

The usage for that is very broad, but heavy users are hypervisors like
Hyper-V / KVM (CCed Michael and Vitaly here for this reason). The
discussion about the need for that in arm64 is from another thread [0],
so before start implementing/playing with that, I'd like to ask ARM64
community if there is any feedback and in case it's positive, what is
the best implementation strategy (struct callback vs. handler call), etc.

I've CCed ARM64/ARM32 maintainers plus extra people I found as really
involved with ARM architecture - sorry if I added people I shouldn't or
if I forgot somebody (though the ARM mailing-list is CC).
Cheers,


Guilherme


[0]
https://lore.kernel.org/lkml/2787b476-6366-1c83-db80-0393da417497@igalia.com/
See the proposed option (b)