Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp4785059iob; Mon, 9 May 2022 01:19:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwGIh4xIa5mmyWpewSvfb57X8req3P/wj4Ecu1FXXbuGeWC9ZoYgNBz/E3oFKLXQJtXj/DM X-Received: by 2002:a17:90b:1e09:b0:1dc:d3fa:dabc with SMTP id pg9-20020a17090b1e0900b001dcd3fadabcmr17685564pjb.225.1652084386691; Mon, 09 May 2022 01:19:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652084386; cv=none; d=google.com; s=arc-20160816; b=e0s8zxvvyaTka+26DCWPA4uz7BUZF1crONJyPv2VpOk0/wjmyzTE7xQqIWdoRL8w+i 4PLvwSEv2DKreH9YKzisz2vHdSD8djZsQHSYEg99rOJXWPgzNr1UiojdEql27MPBhQVb YA3RY6yG543ZSmcccg+pcxhvBrNpLsZPL4lPTbrpZhEo2xjia3W434hp+ZBkwrdoDxFE BLCDmWfcTTz60NeSMeg6QHl8nm8dyqawiWR2ytg/mZ9/2taTJxhYoXjhKdEDfRJGD1Aj zys4dHTnT7wTJ3USX6ByOWmIWVRbhUi7lcW8mTTRraChh/gWsGOC/GfOfT7/qt0AIfqH PVmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=wmhntI9Uo0i/sVskDNKkxpqZEVqrXc5zVozXZ3ttlmw=; b=fuGom6jn1WrF52uIXskD4KtupMxVty5VtwQqaGkMOvrh/BrVh67dctUfWYsjpbOTPm fyWFqqNBN+yTr9ainZHZN1/ah4aW+gCJ+RIvMBpcfM/Ki4ExjfxZuiuZC99sbOT3ytlP +FnrH3GIUxoI7WFpWSmbPagtgLDCrYvU0cFmg4x/USWIzZZ/SHuEOsf3AMILRrBvdUBe WUeHDUk8qAKET7vJjSsusYdGNJ/qsR5s8l2qPjlc2FACEO5S18FrQdmPaa1lqUjFEvD9 cmaiqwcPcjnCGjXGdGjUBjvoqx9q5+F8xeXQS3oN7dKzSTvCf0jpR+2pnnDPwEL/sgDr n6LA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bAi8KwMm; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [23.128.96.19]) by mx.google.com with ESMTPS id ij30-20020a170902ab5e00b0015cf060b23bsi9114383plb.583.2022.05.09.01.19.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 01:19:46 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bAi8KwMm; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id CA3AE1D8B6B; Mon, 9 May 2022 01:07:46 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1387160AbiEFACD (ORCPT + 99 others); Thu, 5 May 2022 20:02:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1387070AbiEFABb (ORCPT ); Thu, 5 May 2022 20:01:31 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3309E60DB7 for ; Thu, 5 May 2022 16:57:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651795069; x=1683331069; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=UTXQyhtYGmsXw7bhN7zaVr8NO2RbQS3Z18S2QU+fmiU=; b=bAi8KwMmiiRz11vHIlPSx5xBISbI+rV/zdITXHwh/BVlhd6RqYfbHxUA zmGvQzC7N27/aUzi//Bd0cloTmrRnKqwXfauyBZAPIQ/f9lQ1UYVBzBs3 05dvNEkP/UIl0xzgNe1adz4rD+BNXiLR1o5kQzFcXj1lVnv7EbtYbw9Wb NnfF5S553k2QT7bt+TVtNRYvo2Zt9hSWJORaOujxImmxx5+/XWSqmLttM 9rU9IZwK739fnLf256bidM41NAW8MZr8q6GNgVNQHyAaIPxWxMQ7FWVLO CSfqVz1cz/jrM31K2bjNamXnALYtAAwjCxOiolobPJCEFt4H6psI8ZqjJ w==; X-IronPort-AV: E=McAfee;i="6400,9594,10338"; a="250283625" X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="250283625" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 May 2022 16:57:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="694914350" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by orsmga004.jf.intel.com with ESMTP; 05 May 2022 16:57:47 -0700 From: Ricardo Neri To: Thomas Gleixner , x86@kernel.org Cc: Tony Luck , Andi Kleen , Stephane Eranian , Andrew Morton , Joerg Roedel , Suravee Suthikulpanit , David Woodhouse , Lu Baolu , Nicholas Piggin , "Ravi V. Shankar" , Ricardo Neri , iommu@lists.linux-foundation.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Ricardo Neri Subject: [PATCH v6 08/29] iommu/vt-d: Rework prepare_irte() to support per-IRQ delivery mode Date: Thu, 5 May 2022 16:59:47 -0700 Message-Id: <20220506000008.30892-9-ricardo.neri-calderon@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506000008.30892-1-ricardo.neri-calderon@linux.intel.com> References: <20220506000008.30892-1-ricardo.neri-calderon@linux.intel.com> X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RDNS_NONE,SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org struct irq_cfg::delivery_mode specifies the delivery mode of each IRQ separately. Configuring the delivery mode of an IRTE would require adding a third argument to prepare_irte(). Instead, simply take a pointer to the irq_cfg for which an IRTE is being configured. This change does not cause functional changes. Cc: Andi Kleen Cc: David Woodhouse Cc: "Ravi V. Shankar" Cc: Lu Baolu Cc: Stephane Eranian Cc: iommu@lists.linux-foundation.org Cc: linuxppc-dev@lists.ozlabs.org Cc: x86@kernel.org Reviewed-by: Ashok Raj Reviewed-by: Tony Luck Reviewed-by: Lu Baolu Signed-off-by: Ricardo Neri --- Changes since v5: * Only change the signature of prepare_irte(). A separate patch changes the setting of the delivery_mode. Changes since v4: * None Changes since v3: * None Changes since v2: * None Changes since v1: * Introduced this patch. --- drivers/iommu/intel/irq_remapping.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c index d2764a71f91a..66d37186ec28 100644 --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -1111,7 +1111,7 @@ void intel_irq_remap_add_device(struct dmar_pci_notify_info *info) dev_set_msi_domain(&info->dev->dev, map_dev_to_ir(info->dev)); } -static void prepare_irte(struct irte *irte, int vector, unsigned int dest) +static void prepare_irte(struct irte *irte, struct irq_cfg *irq_cfg) { memset(irte, 0, sizeof(*irte)); @@ -1126,8 +1126,8 @@ static void prepare_irte(struct irte *irte, int vector, unsigned int dest) */ irte->trigger_mode = 0; irte->dlvry_mode = apic->delivery_mode; - irte->vector = vector; - irte->dest_id = IRTE_DEST(dest); + irte->vector = irq_cfg->vector; + irte->dest_id = IRTE_DEST(irq_cfg->dest_apicid); /* * When using the destination mode of physical APICID, only the @@ -1278,8 +1278,7 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data, { struct irte *irte = &data->irte_entry; - prepare_irte(irte, irq_cfg->vector, irq_cfg->dest_apicid); - + prepare_irte(irte, irq_cfg); switch (info->type) { case X86_IRQ_ALLOC_TYPE_IOAPIC: /* Set source-id of interrupt request */ -- 2.17.1