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Subject: Re: [PATCH] clocksource/drivers/riscv: Events are stopped during CPU
 suspend
From:   Jessica Clarke <jrtc27@jrtc27.com>
In-Reply-To: <20220509012121.40031-1-samuel@sholland.org>
Date:   Mon, 9 May 2022 03:56:43 +0100
Cc:     Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Atish Patra <atishp@atishpatra.org>,
        Dmitriy Cherkasov <dmitriy@oss-tech.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
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References: <20220509012121.40031-1-samuel@sholland.org>
To:     Samuel Holland <samuel@sholland.org>
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On 9 May 2022, at 02:21, Samuel Holland <samuel@sholland.org> wrote:
>=20
> Some implementations of the SBI time extension depend on hart-local
> state (for example, CSRs) that are lost or hardware that is powered
> down when a CPU is suspended. To be safe, the clockevents driver
> cannot assume that timer IRQs will be received during CPU suspend.
>=20
> Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")

Surely that=E2=80=99s not right? A commit from 2018 can=E2=80=99t have =
been expected to
predict the future, I would expect this to be one of the patches adding
suspend to RISC-V which came years later.

Jess

> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>=20
> drivers/clocksource/timer-riscv.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/clocksource/timer-riscv.c =
b/drivers/clocksource/timer-riscv.c
> index 1767f8bf2013..593d5a957b69 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long =
delta,
> static unsigned int riscv_clock_event_irq;
> static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) =3D =
{
> 	.name			=3D "riscv_timer_clockevent",
> -	.features		=3D CLOCK_EVT_FEAT_ONESHOT,
> +	.features		=3D CLOCK_EVT_FEAT_ONESHOT | =
CLOCK_EVT_FEAT_C3STOP,
> 	.rating			=3D 100,
> 	.set_next_event		=3D riscv_clock_next_event,
> };
> --=20
> 2.35.1
>=20
>=20
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