Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp4851388iob; Mon, 9 May 2022 03:11:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwEespOHCpocVBgSyL/gsX3Fbrak+VX7xz1c2CBB1crEHzZB1HZf6xo9YbIOrS/B1xMzTAr X-Received: by 2002:a17:90b:4d11:b0:1dc:ec4f:a19c with SMTP id mw17-20020a17090b4d1100b001dcec4fa19cmr12529956pjb.117.1652091071777; Mon, 09 May 2022 03:11:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652091071; cv=none; d=google.com; s=arc-20160816; b=GzIEZ8NMxcX3TqEkedYcFm59SCiOSE3z9ShIs2l2J6kxB/HpqLDozAwFtktuPsiyLT H4kwLct4io3dQXC+80VCfI+SysjScgoT3nMeCjyn1EHa7ZP2kNwR625jyT/vJ/jNs5CN L60lmuHL07XFlPHDFlsEP/SJu2sfPHQIkAFj9vxxQMNyk/C/6w/6o6KbvJdidTBhniHz xq53zRWzL673geXSxykaNIccb3lnUo57BkFI2vO4O1utDzqprpmzCDXFnM9P/fdYsNSY GA1NAL5lyJD8UTClfeWGYQr6zZSNpW91+HpDvh0ktYoqImDYtLoWW2d5ERYKDg4X3Xo6 Cd1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=mcCUdkdZdrwJFzp5HhPNEdv6TdFuDacwdjR0GP40wx8=; b=gaf4WG8mvyWD/S6HckN+nshKYCaheJS4K7d470fEWbuIbjNYzIBHIPMDl/zXn41+ZM u9nU8KQVjbvIyuhayL+QVkPjS08Vmoxfg+CqPVsSezBZ+V7r4igUcPxzfjgZMyC6IiJF yRGqAcWjTm4CZ7uEXUl3Fb6uwQJi8cKB0PhIkjrFzjmTNb0gCwAINeWF4m6nNotHe10C hi4UkRuWa5hh1h7SSyVt5RNWNsq4VDvC73ptGEWq1HrkuKRjCABh6Q0ikvipwdy2rGuj PJEwy92fd+2d9XqrPhBFggVYLZDgp81Fhaq85M8MRiLLS1lprMQ/lZWVQWZ5H4+sV8SB C2cw== ARC-Authentication-Results: i=1; mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [23.128.96.19]) by mx.google.com with ESMTPS id d19-20020a056a00199300b005061dab8a95si14417535pfl.121.2022.05.09.03.11.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 03:11:11 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id A403323AF2B; Mon, 9 May 2022 02:50:24 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233109AbiEIFUl (ORCPT + 99 others); Mon, 9 May 2022 01:20:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234425AbiEIFOe (ORCPT ); Mon, 9 May 2022 01:14:34 -0400 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DEA826269; Sun, 8 May 2022 22:10:40 -0700 (PDT) X-IronPort-AV: E=Sophos;i="5.91,210,1647270000"; d="scan'208";a="120333429" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 09 May 2022 14:10:40 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id B97D54004199; Mon, 9 May 2022 14:10:35 +0900 (JST) From: Lad Prabhakar To: Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Linus Walleij , Bartosz Golaszewski , Geert Uytterhoeven , Philipp Zabel , linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH v2 4/5] gpio: gpiolib: Add ngirq member to struct gpio_irq_chip Date: Mon, 9 May 2022 06:09:52 +0100 Message-Id: <20220509050953.11005-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220509050953.11005-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20220509050953.11005-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Supported GPIO IRQs by the chip is not always equal to the number of GPIO pins. For example on Renesas RZ/G2L SoC where it has GPIO0-122 pins but at a give point a maximum of only 32 GPIO pins can be used as IRQ lines in the IRQC domain. This patch adds ngirq member to struct gpio_irq_chip and passes this as a size to irq_domain_create_hierarchy()/irq_domain_create_simple() if it is being set in the driver otherwise fallbacks to using ngpio. Signed-off-by: Lad Prabhakar --- drivers/gpio/gpiolib.c | 4 ++-- include/linux/gpio/driver.h | 8 ++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 7be01c70ee4e..4b402141580e 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1221,7 +1221,7 @@ static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) gc->irq.domain = irq_domain_create_hierarchy( gc->irq.parent_domain, 0, - gc->ngpio, + gc->irq.ngirq ?: gc->ngpio, gc->irq.fwnode, &gc->irq.child_irq_domain_ops, gc); @@ -1574,7 +1574,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, } else { /* Some drivers provide custom irqdomain ops */ gc->irq.domain = irq_domain_create_simple(fwnode, - gc->ngpio, + gc->irq.ngirq ?: gc->ngpio, gc->irq.first, gc->irq.domain_ops ?: &gpiochip_domain_ops, gc); diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 874aabd270c9..ed6df186907d 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -51,6 +51,14 @@ struct gpio_irq_chip { */ const struct irq_domain_ops *domain_ops; + /** + * @ngirq: + * + * The number of GPIO IRQ's handled by this IRQ domain; usually is + * equal to ngpio. + */ + u16 ngirq; + #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY /** * @fwnode: -- 2.25.1