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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id l18-20020a170902d35200b0015f0063568bsi6433537plk.340.2022.05.09.03.49.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 03:49:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=UMu99fQ7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C3737274A34; Mon, 9 May 2022 03:09:58 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237703AbiEIJfC (ORCPT + 99 others); Mon, 9 May 2022 05:35:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235662AbiEIJ1p (ORCPT ); Mon, 9 May 2022 05:27:45 -0400 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B82D1202B1D; Mon, 9 May 2022 02:23:50 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id gh6so25635262ejb.0; Mon, 09 May 2022 02:23:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=vBn4dTWE6t2YjSxYVSZ+XHjDtUdnCLlr7Yub++AF2JY=; b=UMu99fQ7EvMM4azPSGgoeypDXe4MYng1mEZ0U21NvAcrEz1gntIWP1xBSZkWmXmk7F CtpTZeQFa1+/kiBhnXjmM6LvhsoEModffF/1A2VG0q3jwVSUaS5xOF6mztXXnh1etJMb z1yfkcB6Z3iY7Nv3cfYqN7kgyoBM4AbbaUyaUvpshu0X5PkLf1kYrUlIpEFiKcjh6CCb LY2+ypStUcoiH1P/oQWrBIatVc71LtRUUDpNR2RULXF1A9++gxQNRBV7KWp7DdF+mbVo idt0DpZFmRleGWqkd4ti7Rwojh2RsGWU73piA14Z2HLTp8o84T3YcXvBcHj1xGKoNxwk dKaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=vBn4dTWE6t2YjSxYVSZ+XHjDtUdnCLlr7Yub++AF2JY=; b=DGobrNnbvRM2DncV82gg08LqQ7prH9s4l5ivgIezn+evsOLUFh14XYUHnSE/V9e2CS nU+StEPrFwAjRd7IH1g5sipxL/u4IUUdZwOozKDNNgHe/3pVVj20pmIHvAlu1EjUk4bk yuAEwi4M4OhAzi+ubav1u7hItMO39Zldxrlrfqgm5JB7COi2BcNmLVgZ0bOwdj/SAqhk XtYd1JSMhFknmnGw5mrwZD3M4YlKM2MDCNmrp5jskI9sj5QiAyC1IdoOHEhV+vS1W+hd +criqnseZ0nI7b2wgi+T9wYRaQJBFMLjIvCWhWTyn53WudvFQP+6EB9t8xllfQnMAuzW N5Tw== X-Gm-Message-State: AOAM530p8XD/GucnHki00SfEEWKCWQiOPVOvNiJ8FdG72+zuh9cS+etU T+Kp7nb2tqApX1EG+E1Td2n2phYLUKGddyCc1ic= X-Received: by 2002:a17:907:628e:b0:6d9:c6fa:6168 with SMTP id nd14-20020a170907628e00b006d9c6fa6168mr13501745ejc.132.1652088229173; Mon, 09 May 2022 02:23:49 -0700 (PDT) MIME-Version: 1.0 References: <20220509064928.2352796-1-Qing-wu.Li@leica-geosystems.com.cn> <20220509064928.2352796-4-Qing-wu.Li@leica-geosystems.com.cn> In-Reply-To: <20220509064928.2352796-4-Qing-wu.Li@leica-geosystems.com.cn> From: Andy Shevchenko Date: Mon, 9 May 2022 11:23:13 +0200 Message-ID: Subject: Re: [PATCH V4 3/5] iio: accel: sca3300: modified to support multi chips To: LI Qingwu Cc: jic23@kernel.org, lars@metafoo.de, robh+dt@kernel.org, tomas.melin@vaisala.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 9, 2022 at 8:49 AM LI Qingwu wrote: > > The driver supports sca3300 only. > There are some other similar chips, for instance, SCL3300. > Prepare the way for multiple chips and additional channels. > Modify the driver to read the device id. > Add the tables for the corresponding id to support multiple chips. > Add prepares for the addition of extra channels. > Add prepares for handling the operation modes for multiple chips. Fancy style. Utilize the entire width of the line, i.e. ~72 characters. ... > +struct sca3300_chip_info { > + const struct iio_chan_spec *channels; > + u8 num_channels; > + const unsigned long *scan_masks; > + const int (*accel_scale)[2]; > + const int *accel_scale_map; > + u8 num_accel_scales; > + const int *freq_table; > + const int *freq_map; > + u8 num_freqs; > + const int *avail_modes_table; > + u8 num_avail_modes; > + const char *name; > + u8 chip_id; I recommend to shuffle it in a way that u8 members go closer to each other if possible. Like: const unsigned long *scan_masks; const struct iio_chan_spec *channels; u8 num_channels; u8 num_accel_scales; const int (*accel_scale)[2]; const int *accel_scale_map; It will save a few bytes per object instance due to padding reduction. The idea about grouping all of them also can be done despite the comment given previously by someone. > +}; ... > + for (i = 0; i < sca_data->chip->num_avail_modes; i++) { > + if (sca_data->chip->avail_modes_table[i] == reg_val) { > + *index = i; > + return 0; > + } > + } > + > + return -EINVAL; Can be modified to use standard pattern (return errors first), but it's up to maintainers, because the latter requires an additional check after the loop. ... > + for (i = 0; i < chip->num_avail_modes; i++) { > + if (val == chip->freq_table[chip->freq_map[i]]) { > + if (chip->accel_scale[chip->accel_scale_map[index]] == > + chip->accel_scale[chip->accel_scale_map[i]]) > + return sca3300_set_op_mode(data, i); The if (a) { if (b) { ... } } can be replaced by if (a && b) { ... } > + } > + } > + > + return -EINVAL; As per above. -- With Best Regards, Andy Shevchenko