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[176.182.171.101]) by smtp.googlemail.com with ESMTPSA id z11-20020a5d654b000000b0020c6b78eb5asm10934000wrv.68.2022.05.09.04.44.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 May 2022 04:44:06 -0700 (PDT) Message-ID: <32af96b3-5b87-6db1-ad23-8bc66d5530ff@linaro.org> Date: Mon, 9 May 2022 13:44:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH] clocksource/drivers/riscv: Events are stopped during CPU suspend Content-Language: en-US To: Samuel Holland , Thomas Gleixner Cc: Albert Ou , Atish Patra , Dmitriy Cherkasov , Palmer Dabbelt , Paul Walmsley , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: <20220509012121.40031-1-samuel@sholland.org> From: Daniel Lezcano In-Reply-To: <20220509012121.40031-1-samuel@sholland.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,RDNS_NONE,SPF_HELO_NONE, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/05/2022 03:21, Samuel Holland wrote: > Some implementations of the SBI time extension depend on hart-local > state (for example, CSRs) that are lost or hardware that is powered > down when a CPU is suspended. To be safe, the clockevents driver > cannot assume that timer IRQs will be received during CPU suspend. > > Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver") > Signed-off-by: Samuel Holland > --- Applied, thanks -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog