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[2620:137:e000::1:18]) by mx.google.com with ESMTPS id 204-20020a6217d5000000b0050d304dbf4dsi13375055pfx.210.2022.05.09.07.28.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 07:28:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) client-ip=2620:137:e000::1:18; Authentication-Results: mx.google.com; dkim=fail header.i=@microchip.com header.s=mchp header.b=RVwHgwm7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C13A21D48C3; Mon, 9 May 2022 07:27:15 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236600AbiEIOaz (ORCPT + 99 others); Mon, 9 May 2022 10:30:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236985AbiEIOam (ORCPT ); Mon, 9 May 2022 10:30:42 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEBC73206D; Mon, 9 May 2022 07:26:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1652106408; x=1683642408; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dVVRzKApVE50y12Leb73RnyQE0EWl3gk7c+UgrPbLxI=; b=RVwHgwm7qa77UFsi4QzMHByJ/XTcUptrV33fQuqPTA9xoVmDgHWQqnKy PPW5UDKMiadFJNLgNJmVkG5mpLpkU9KhWs7rijj6TqdzfeNDFLRNr95j/ ZV3yyE5K3iWWLaj8zIgszhiUcs7trnXXFrOxntL+U9tNT0ncLPjP3dm3z viLQsxE4PImiyOIQFFHZTgQIKc0gzf7tsIFtYa2Lum/1GIhuSM+OR+V64 ApwF+Ss7zifYgUypuPtPqxVT06e9YTSzGXNRijp/gvgeDvukffRgrnQ9u oobkzSD09I/B2ksrWioCLrRCOt6b5l3LgEaWgwDZvq4MaQNmlrtpiYTYF g==; X-IronPort-AV: E=Sophos;i="5.91,211,1647327600"; d="scan'208";a="172518068" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 09 May 2022 07:26:47 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 9 May 2022 07:26:47 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 9 May 2022 07:26:44 -0700 From: Conor Dooley To: Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Daire McNamara , Cyril Jean , , , , , Arnd Bergmann Subject: [PATCH v5 01/10] riscv: dts: microchip: remove icicle memory clocks Date: Mon, 9 May 2022 15:26:02 +0100 Message-ID: <20220509142610.128590-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.35.2 In-Reply-To: <20220509142610.128590-1-conor.dooley@microchip.com> References: <20220509142610.128590-1-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-1.7 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The clock properties in the icicle kit's memory entries cause dtbs_check errors: arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: /: memory@80000000: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+' Get rid of the clocks to avoid the errors. Reported-by: Palmer Dabbelt Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board") Fixes: 5b28df37d311 ("riscv: dts: microchip: update peripherals in icicle kit device tree") Reviewed-by: Heiko Stuebner Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts index 3392153dd0f1..c71d6aa6137a 100644 --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts @@ -32,14 +32,12 @@ cpus { ddrc_cache_lo: memory@80000000 { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x2e000000>; - clocks = <&clkcfg CLK_DDRC>; status = "okay"; }; ddrc_cache_hi: memory@1000000000 { device_type = "memory"; reg = <0x10 0x0 0x0 0x40000000>; - clocks = <&clkcfg CLK_DDRC>; status = "okay"; }; }; -- 2.35.2