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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h8-20020a0564020e8800b00427da5fd281si11377027eda.580.2022.05.09.14.48.54; Mon, 09 May 2022 14:49:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b="Zx5o/pCt"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230209AbiEIVLx (ORCPT + 99 others); Mon, 9 May 2022 17:11:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229975AbiEIVLp (ORCPT ); Mon, 9 May 2022 17:11:45 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC861F74A3; Mon, 9 May 2022 14:07:49 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: kholk11) with ESMTPSA id DAD2D1F430E3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652130468; bh=olbInTBcsJ7OBs0Az64gQWO87DN9MjbVGnMzsKIcrgw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Zx5o/pCtkpfsji57HfqegarDPp7mtCGg/vVQN6+xb8LAab9KyntJaL4FPb72jQH3S 3vRVnbAhSsBg6AYvSn91839Jgptv5K+LibqCXStqoK5p+Goo3SbrwgDZ00WPpDn6Jq C42O5RmOM3Z+8yoUhp/vE/tZ8S8j6fKSw+BYhgpTLCD3ctJgoJDKsUVooaLkfgGpZb 26NRufbQrtWzXDNmVxfm6+PH2KLKq378m5JbAfEutwnjWm4RCpA2kFzTgFAy2RMDgQ QOV676guliZAJIWZN0X5/XsRnMcnaCj6eZhZ99ctglI7O65g5HbUc+S1dZPZMVmkPQ wKEF7tDYncZGQ== From: AngeloGioacchino Del Regno To: daniel.lezcano@linaro.org Cc: tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, konrad.dybcio@somainline.org, marijn.suijten@somainline.org, martin.botka@somainline.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, paul.bouchara@somainline.org, AngeloGioacchino Del Regno Subject: [PATCH v2 1/2] dt-bindings: timer: mediatek: Add CPUX System Timer and MT6795 compatible Date: Mon, 9 May 2022 23:07:39 +0200 Message-Id: <20220509210741.12020-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220509210741.12020-1-angelogioacchino.delregno@collabora.com> References: <20220509210741.12020-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document the "CPUXGPT" CPU General Purpose Timer, used as ARM/ARM64 System Timer on MediaTek platforms and add the MT6795 compatible for it. Signed-off-by: AngeloGioacchino Del Regno --- .../devicetree/bindings/timer/mediatek,mtk-timer.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt index fbd76a8e023b..2d139d24e535 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt @@ -2,6 +2,7 @@ MediaTek Timers --------------- MediaTek SoCs have two different timers on different platforms, +- CPUX (ARM/ARM64 System Timer) - GPT (General Purpose Timer) - SYST (System Timer) @@ -28,6 +29,9 @@ Required properties: * "mediatek,mt7629-timer" for MT7629 compatible timers (SYST) * "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST) + For those SoCs that use CPUX + * "mediatek,mt6795-systimer" for MT6795 compatible timers (CPUX) + - reg: Should contain location and length for timer register. - clocks: Should contain system clock. -- 2.35.1