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It >> advertises a PMU version which Qemu uses to determine the >> availability of additional MSRs to manage the PMCs. >> >> Upon receiving a KVM_GET_SUPPORTED_CPUID ioctl request for >> the same, the kernel constructs return values based on the >> x86_pmu_capability irrespective of the vendor. >> >> This leaf and the additional MSRs are not supported on AMD >> processors. If PerfMonV2 is detected, the PMU version is >> set to 2 and guest startup breaks because of an attempt to >> access a non-existent MSR. Return zeros to avoid this. >> >> Fixes: a6c06ed1a60a ("KVM: Expose the architectural performance monitoring CPUID leaf") >> Reported-by: Vasant Hegde >> Signed-off-by: Sandipan Das >> Signed-off-by: Peter Zijlstra (Intel) >> Link: https://lkml.kernel.org/r/54bc7fe4cadf6bdef823bab1fba43d4891d2e1a9.1650515382.git.sandipan.das@amd.com >> --- >> arch/x86/kvm/cpuid.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >> index b24ca7f..ae1d963 100644 >> --- a/arch/x86/kvm/cpuid.c >> +++ b/arch/x86/kvm/cpuid.c >> @@ -887,6 +887,12 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) >> union cpuid10_eax eax; >> union cpuid10_edx edx; >> >> + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD || >> + boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) { >> + entry->eax = entry->ebx = entry->ecx = entry->edx = 0; >> + break; >> + } >> + > > This is all fine and dandy but this patch in tip conflicts with the very > similar patch of yours: > > 5a1bde46f98b ("kvm: x86/cpuid: Only provide CPUID leaf 0xA if host has architectural PMU") > > which is already upstream. > > So which is it? Should we zap this version in tip instead? > Please remove this patch and keep commit 5a1bde46f98b instead. - Sandipan