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Date:   Tue, 10 May 2022 13:43:32 +0100
From:   Mark Brown <broonie@kernel.org>
To:     Geert Uytterhoeven <geert@linux-m68k.org>
Cc:     Will Deacon <will@kernel.org>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: ARM Scalable Matrix Extension is ARMv9-A
Message-ID: <Ynpd9DJ2SyC1Fi+a@sirena.org.uk>
References: <df002b0ff3cb89954d5a2c39a5dd8528d45771f3.1652103603.git.geert+renesas@glider.be>
 <20220510091502.GA27219@willie-the-truck>
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On Tue, May 10, 2022 at 11:20:40AM +0200, Geert Uytterhoeven wrote:
> On Tue, May 10, 2022 at 11:15 AM Will Deacon <will@kernel.org> wrote:
> > On Mon, May 09, 2022 at 03:40:30PM +0200, Geert Uytterhoeven wrote:

> > > +       The Scalable Matrix Extension (SME) is an ARMv9-A extension to the
> > > +       AArch64 execution state which utilises a substantial subset of the
> > > +       SVE instruction set, together with the addition of new architectural

> > Why is this useful information? The v9 vs v8 distinction is purely a

> Because I tend to disable support for extensions that are not present
> in Renesas SoCs in the (local) renesas_defconfig.
> If it's ARMv9, I know it's not present in e.g. Cortex-A57 or A-76.

Like Will says the versioning information is a shaky way of figuring
that out, especially with a feature like SME which is intended to be
totally optional.  Even once you have v9 systems you're still going to
need to look at the specific systems to figure out what's implemented in
your specific silicon.

> > marketing thing, so I'd be _very_ wary of drawing any technical conclusions
> > based on that, especially as Arm have a track record for "backporting"
> > features into older CPUs if there is demand for it. Do you know what the
> > toolchains have done here? (i.e. is there march=armv9-a or can you do
> > march=armv8-a+sme or something else?).

> I have no idea.  This option doesn't seem to control any compiler
> flags?

GCC does have armv9-a, not cheked clang.

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Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmJ6XfMACgkQJNaLcl1U
h9Dt1gf+LDle+kxer7rZr20WqZ37pszk/ADamzmFdn2/06/XQmxjYt/dU5qo35mT
DxMNpXxMWoVm4fcpEIsq0lhmyACZxn1DN17jBS3XZm17IIy/2YmOAHGH1kxPdK7Z
kgeadTb3odAlF6fjLyPW23qQZ0/rFF+VFDUFhGW9bl85uHsqVDw4VfCfjAqPQFwN
bs4HalMOw4PQIiem2pvxs21M1j1ynRw1Zl+oRJ7/JongqMcwDkJS0Hd/3DkyHK0N
zlA4Pb/XCq2bwO5PPP7DSrsss7WffEOYL+UpzXI63sPyUOJ8om+0929peDXEQhsD
G6BA05UwUW+KZ2LvD8Vtv3Jw1rFDmw==
=UWjT
-----END PGP SIGNATURE-----

--1KgG4KnrE+73JjdD--