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Date:   Tue, 10 May 2022 12:07:42 +0100
From:   Sudeep Holla <sudeep.holla@arm.com>
To:     Suzuki K Poulose <suzuki.poulose@arm.com>,
        Besar Wicaksono <bwicaksono@nvidia.com>
Cc:     Will Deacon <will@kernel.org>, catalin.marinas@arm.com,
        mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
        thanu.rangarajan@arm.com, Michael.Williams@arm.com,
        treding@nvidia.com, jonathanh@nvidia.com, vsethi@nvidia.com,
        Mathieu Poirier <mathieu.poirier@linaro.org>
Subject: Re: [PATCH 0/2] perf: ARM CoreSight PMU support
Message-ID: <20220510110742.ievkihggndpms3fn@bogus>
References: <20220509002810.12412-1-bwicaksono@nvidia.com>
 <20220509092843.GB26264@willie-the-truck>
 <2e5e09f9-b71b-d936-e291-db8f94554b18@arm.com>
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On Mon, May 09, 2022 at 11:02:23AM +0100, Suzuki K Poulose wrote:
> Cc: Mike Williams, Mathieu Poirier
> 
> On 09/05/2022 10:28, Will Deacon wrote:
> > On Sun, May 08, 2022 at 07:28:08PM -0500, Besar Wicaksono wrote:
> > > Add driver support for ARM CoreSight PMU device and event attributes for NVIDIA
> > > implementation. The code is based on ARM Coresight PMU architecture and ACPI ARM
> > > Performance Monitoring Unit table (APMT) specification below:
> > >   * ARM Coresight PMU:
> > >          https://developer.arm.com/documentation/ihi0091/latest
> > >   * APMT: https://developer.arm.com/documentation/den0117/latest
> > > 
> > > Notes:
> > >   * There is a concern on the naming of the PMU device.
> > >     Currently the driver is probing "arm-coresight-pmu" device, however the APMT
> > >     spec supports different kinds of CoreSight PMU based implementation. So it is
> > >     open for discussion if the name can stay or a "generic" name is required.
> > >     Please see the following thread:
> > >     http://lists.infradead.org/pipermail/linux-arm-kernel/2022-May/740485.html
> > > 
> > > Besar Wicaksono (2):
> > >    perf: coresight_pmu: Add support for ARM CoreSight PMU driver
> > >    perf: coresight_pmu: Add support for NVIDIA SCF and MCF attribute
> > > 
> > >   arch/arm64/configs/defconfig                  |    1 +
> > >   drivers/perf/Kconfig                          |    2 +
> > >   drivers/perf/Makefile                         |    1 +
> > >   drivers/perf/coresight_pmu/Kconfig            |   10 +
> > >   drivers/perf/coresight_pmu/Makefile           |    7 +
> > >   .../perf/coresight_pmu/arm_coresight_pmu.c    | 1317 +++++++++++++++++
> > >   .../perf/coresight_pmu/arm_coresight_pmu.h    |  147 ++
> > >   .../coresight_pmu/arm_coresight_pmu_nvidia.c  |  300 ++++
> > >   .../coresight_pmu/arm_coresight_pmu_nvidia.h  |   17 +
> > >   9 files changed, 1802 insertions(+)
> > 
> > How does this interact with all the stuff we have under
> > drivers/hwtracing/coresight/?
> 
> Absolutely zero, except for the name. The standard
> is named "CoreSight PMU" which is a bit unfortunate,
> given the only link, AFAIU, with the "CoreSight" architecture
> is the Lock Access Register(LAR). For reference, the
> drivers/hwtracing/coresight/ is purely "CoreSight" self-hosted
> tracing and the PMU is called "cs_etm" (expands to coresight etm).
> Otherwise the standard doesn't have anything to do with what
> exists already in the kernel.
> 
> That said, I am concerned that the "coresight_pmu" is easily confused
> with what exists today. Given that this is more of a "PMU" standard
> for the IPs in the Arm world, it would be better to name it as such
> avoiding any confusion with the existing PMUs.
> 

Thanks Suzuki. I did suggest something similar[1] but asked to retain it
so that it can be discussed in the bigger and right forum.

> One potential recommendation for the name is, "Arm PMU"  (The ACPI table is
> named Arm PMU Table). But then that could be clashing with the armv8_pmu
> :-(.
> 
> Some of the other options are :
> 
> "Arm Generic PMU"
> "Arm Uncore PMU"

I wasn't sure on this if there is any restriction on usage of this on Arm
and hence didn't make the suggestion. But if allowed, this would be my
choice too.

-- 
Regards,
Sudeep

[1] https://lore.kernel.org/lkml/20220504182633.a3mwuiohfqtjvpep@bogus