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From:   Qing Zhang <zhangqing@loongson.cn>
To:     Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc:     devicetree@vger.kernel.org, linux-mips@vger.kernel.org,
        linux-kernel@vger.kernel.org, yangtiezhu@loongson.cn,
        zhangqing@loongson.cn
Subject: [PATCH 2/3] MIPS: Loongson64: DTS: Add Loongson-2K1000 DTS related smp support
Date:   Wed, 11 May 2022 16:30:06 +0800
Message-Id: <20220511083007.17700-2-zhangqing@loongson.cn>
In-Reply-To: <20220511083007.17700-1-zhangqing@loongson.cn>
References: <20220511083007.17700-1-zhangqing@loongson.cn>
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Add the device tree node and connect it to the CPU nodes.

Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
---
 .../mips/boot/dts/loongson/loongson64-2k1000.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
index 8143a61111e3..3b765c063d7a 100644
--- a/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
+++ b/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi
@@ -20,6 +20,16 @@
 			reg = <0x0>;
 			#clock-cells = <1>;
 			clocks = <&cpu_clk>;
+			enable-method = "mmio-ipi";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "loongson,gs264";
+			reg = <0x1>;
+			#clock-cells = <1>;
+			clocks = <&cpu_clk>;
+			enable-method = "mmio-ipi";
 		};
 	};
 
@@ -44,6 +54,11 @@
 		compatible = "mti,cpu-interrupt-controller";
 	};
 
+	ipi: interrupt-controller@1fe11000 {
+		compatible = "loongson, mmio-ipi";
+		reg = <0 0x1fe11000 0 0x40>;
+	};
+
 	package0: bus@10000000 {
 		compatible = "simple-bus";
 		#address-cells = <2>;
-- 
2.20.1