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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ds18-20020a170907725200b006f396dc0ad3si1833137ejc.266.2022.05.11.03.42.25; Wed, 11 May 2022 03:42:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=lrZLrGsH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243275AbiEKIE4 (ORCPT + 99 others); Wed, 11 May 2022 04:04:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241368AbiEKIEy (ORCPT ); Wed, 11 May 2022 04:04:54 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A6788D69B for ; Wed, 11 May 2022 01:04:51 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D50D3B8200B for ; Wed, 11 May 2022 08:04:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9E698C2BBE4; Wed, 11 May 2022 08:04:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1652256288; bh=wPc1LGBt4XJQB6/voooZDx15ohpwrUXWrmK2sHt6Avo=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=lrZLrGsHXxR4FyLnpDwdcYBrQbAfvx8Lu5swuQC8TaBSEo1qyNVoW9zldNOfwYMhM ndbj34di5bRSaP4rAA2Bbl36Rse6xP05r0Y3XygR78WyAe6Cs6pldQg6nhimIzQCm8 P3x7ELPJOa4lciRmExhsMd9BO1wC/E9/5sJazhzNgXi+8MiQLO4GNPPvCt0cs7yr+m cP/jRSwNQFTXUcsnCTcZiMVxLMgG81ZAWGfLfmqyIKL7G7Ui2+1QDxD7pl6atixBGs x1S1TMlFqIiep1dFhmQjqdiyXe5p8RVfoda8pfF7dsAqp3vS7/+z1j6BaYAAU6ywyj rmIBhHqi6J4Eg== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nohKv-00ATnS-S9; Wed, 11 May 2022 09:04:46 +0100 Date: Wed, 11 May 2022 09:04:45 +0100 Message-ID: <874k1w7aw2.wl-maz@kernel.org> From: Marc Zyngier To: Antonio Borneo Cc: Thomas Gleixner , Maxime Coquelin , Alexandre Torgue , , , , Loic Pallardy , Ludovic Barre , Pascal Paillet Subject: Re: [PATCH 2/7] irqchip/stm32-exti: manage IMR at each mask/unmask for direct event In-Reply-To: <20220510164123.557921-2-antonio.borneo@foss.st.com> References: <20220510164123.557921-1-antonio.borneo@foss.st.com> <20220510164123.557921-2-antonio.borneo@foss.st.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: antonio.borneo@foss.st.com, tglx@linutronix.de, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, loic.pallardy@foss.st.com, ludovic.barre@foss.st.com, p.paillet@foss.st.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 10 May 2022 17:41:18 +0100, Antonio Borneo wrote: > > From: Loic Pallardy > > Enable EXTI line through IMR also on direct event. Notice how none of the words above say *anything* about mask/unmask? What happens? What breaks? Is it a fix? If so, what does it fix? M. > > Signed-off-by: Loic Pallardy > Signed-off-by: Antonio Borneo > --- > drivers/irqchip/irq-stm32-exti.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c > index 10c9c742c216..1145f064faa8 100644 > --- a/drivers/irqchip/irq-stm32-exti.c > +++ b/drivers/irqchip/irq-stm32-exti.c > @@ -691,8 +691,8 @@ static struct irq_chip stm32_exti_h_chip_direct = { > .name = "stm32-exti-h-direct", > .irq_eoi = irq_chip_eoi_parent, > .irq_ack = irq_chip_ack_parent, > - .irq_mask = irq_chip_mask_parent, > - .irq_unmask = irq_chip_unmask_parent, > + .irq_mask = stm32_exti_h_mask, > + .irq_unmask = stm32_exti_h_unmask, > .irq_retrigger = irq_chip_retrigger_hierarchy, > .irq_set_type = irq_chip_set_type_parent, > .irq_set_wake = stm32_exti_h_set_wake, > -- > 2.36.0 > > -- Without deviation from the norm, progress is not possible.