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Wed, 11 May 2022 16:14:38 +0000 Received: from [10.41.21.79] (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 11 May 2022 09:14:35 -0700 Message-ID: <1079d4df-153d-62f1-1e6c-0af86345b83a@nvidia.com> Date: Wed, 11 May 2022 21:44:33 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.1 Subject: Re: [Patch v5 6/9] dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB2.0 binding Content-Language: en-US To: Rob Herring CC: , , , , , , , , , Sumit Gupta References: <20220506111217.8833-1-sumitg@nvidia.com> <20220506111217.8833-7-sumitg@nvidia.com> <20220511144958.GA286838-robh@kernel.org> From: Sumit Gupta In-Reply-To: <20220511144958.GA286838-robh@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 10871679-41ff-4ec6-3520-08da3369604e X-MS-TrafficTypeDiagnostic: DM4PR12MB5344:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2022 16:14:50.4636 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 10871679-41ff-4ec6-3520-08da3369604e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT068.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5344 X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, NICE_REPLY_A,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/05/22 20:19, Rob Herring wrote: > External email: Use caution opening links or attachments > > > On Fri, May 06, 2022 at 04:42:14PM +0530, Sumit Gupta wrote: >> Add device-tree binding documentation to represent CBB2.0 (Control >> Backbone) error handling driver. The driver prints debug information >> about failed transaction on receiving interrupt from CBB2.0. > > Same issues in this one that I won't repeat... Will send v6 with the changes. > >> >> Signed-off-by: Sumit Gupta >> --- >> .../arm/tegra/nvidia,tegra234-cbb.yaml | 70 +++++++++++++++++++ >> 1 file changed, 70 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml >> >> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml >> new file mode 100644 >> index 000000000000..fa4383be19d8 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml >> @@ -0,0 +1,70 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#" >> +$schema: "http://devicetree.org/meta-schemas/core.yaml#" >> + >> +title: NVIDIA Tegra CBB 2.0 Error handling driver device tree bindings >> + >> +maintainers: >> + - Sumit Gupta >> + >> +description: |+ >> + The Control Backbone (CBB) is comprised of the physical path from an initiator to a target's >> + register configuration space. CBB 2.0 consists of multiple sub-blocks connected to each other >> + to create a topology. The Tegra234 SoC has different fabrics based on CBB2.0 architecture which >> + include cluster fabrics BPMP, AON, PSC, SCE, RCE, DCE, FSI and "CBB central fabric". >> + >> + In CBB 2.0, each initiator which can issue transactions connects to a Root Master Node (MN) >> + before it connects to any other element of the fabric. Each Root MN contains a Error Monitor >> + (EM) which detects and logs error. Interrupts from various EM blocks are collated by Error >> + Notifier (EN) which is per fabric and presents a single interrupt from fabric to the SoC >> + interrupt controller. >> + >> + The driver handles errors from CBB due to illegal register accesses and prints debug information >> + about failed transaction on receiving the interrupt from EN. Debug information includes Error >> + Code, Error Description, MasterID, Fabric, SlaveID, Address, Cache, Protection, Security Group >> + etc on receiving error notification. >> + >> + If the Error Response Disable (ERD) is set/enabled for an initiator, then SError or Data abort >> + exception error response is masked and an interrupt is used for reporting errors due to illegal >> + accesses from that initiator. The value returned on read failures is '0xFFFFFFFF' for >> + compatibility with PCIE. >> + >> +properties: >> + $nodename: >> + pattern: "^[a-z]+-fabric@[0-9a-f]+$" >> + >> + compatible: >> + enum: >> + - nvidia,tegra234-aon-fabric >> + - nvidia,tegra234-bpmp-fabric >> + - nvidia,tegra234-cbb-fabric >> + - nvidia,tegra234-dce-fabric >> + - nvidia,tegra234-rce-fabric >> + - nvidia,tegra234-sce-fabric >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + items: >> + - description: secure interrupt from error notifier >> + >> +additionalProperties: true > > True is only allowed for common bindings included in other bindings. Ok, will mark as false. > > >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + >> +examples: >> + - | >> + #include >> + >> + cbb-fabric@1300000 { >> + compatible = "nvidia,tegra234-cbb-fabric"; >> + reg = <0x13a00000 0x400000>; >> + interrupts = ; >> + status = "okay"; >> + }; >> -- >> 2.17.1 >> >>