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McKenney" To: John Hubbard Cc: Minchan Kim , Andrew Morton , linux-mm , LKML , John Dias , David Hildenbrand Subject: Re: [PATCH v4] mm: fix is_pinnable_page against on cma page Message-ID: <20220512001204.GI1790663@paulmck-ThinkPad-P17-Gen-1> Reply-To: paulmck@kernel.org References: <2ffa7670-04ea-bb28-28f8-93a9b9eea7e8@nvidia.com> <54b5d177-f2f4-cef2-3a68-cd3b0b276f86@nvidia.com> <8f083802-7ab0-15ec-b37d-bc9471eea0b1@nvidia.com> <20220511234534.GG1790663@paulmck-ThinkPad-P17-Gen-1> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 11, 2022 at 04:57:04PM -0700, John Hubbard wrote: > On 5/11/22 16:45, Paul E. McKenney wrote: > > > > > > Well no, because the "&" operation is a single operation on the CPU, and > > > isn't going to get split up like that. > > > > Chiming in a bit late... > > Much appreciated! > > > The usual way that this sort of thing causes trouble is if there is a > > single store instruction that changes the value from MIGRATE_ISOLATE > > to MIGRATE_CMA, and if the compiler decides to fetch twice, AND twice, > > Doing an AND twice for "x & constant" this definitely blows my mind. Is > nothing sacred? :) Apparently there is not much sacred to compiler writers in search of additional optimizations. :-/ > > and then combine the results. This could give a zero outcome where the > > underlying variable never had the value zero. > > > > Is this sort of thing low probability? > > > > Definitely. > > > > Isn't this sort of thing prohibited? > > > > Definitely not. > > > > So what you have will likely work for at least a while longer, but it > > is not guaranteed and it forces you to think a lot harder about what > > the current implementations of the compiler can and cannot do to you. > > > > The following LWN article goes through some of the possible optimizations > > (vandalisms?) in this area: https://lwn.net/Articles/793253/ > > hmm, I don't think we hit any of those cases, do we? Because here, the > "write" side is via a non-inline function that I just don't believe the > compiler is allowed to call twice. Or is it? Not yet. But if link-time optimizations (LTO) continue their march, I wouldn't feel safe ruling it out... > Minchan's earlier summary: > > CPU 0 CPU1 > > > set_pageblock_migratetype(MIGRATE_ISOLATE) > > if (get_pageblock_migrate(page) & MIGRATE_CMA) > > set_pageblock_migratetype(MIGRATE_CMA) > > if (get_pageblock_migrate(page) & MIGRATE_ISOLATE) > > ...where set_pageblock_migratetype() is not inline. ...especially if the code is reorganized for whatever reason. > thanks, > -- > John Hubbard > NVIDIA But again: > > In the end, it is your code, so you get to decide how much you would > > like to keep track of what compilers get up to over time. ;-) Thanx, Paul