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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR18MB4251.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c65ed9ae-f4cc-4027-1b50-08da33e4ae23 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 May 2022 06:57:29.2974 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: ZogThk/Yvx9gNoEH86a5IEuziOTrEBJ/vqfl9kCulwXr//SVV5GDc7yL2qaftgyslFTRj9S0LjHt8a/DnD/PsA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR18MB4115 X-Proofpoint-ORIG-GUID: 7XVJXxOz5LrGWkPjrYD5Sv_UffDu_e8m X-Proofpoint-GUID: 7XVJXxOz5LrGWkPjrYD5Sv_UffDu_e8m X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-11_07,2022-05-12_01,2022-02-23_01 X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Andrew Lunn > Sent: Thursday, May 12, 2022 3:40 AM > To: Chris Packham > Cc: Vadym Kochan ; > catalin.marinas@arm.com; will@kernel.org; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; gregory.clement@bootlin.com; > sebastian.hesselbarth@gmail.com; Kostya Porotchkin > ; robert.marko@sartura.hr; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; Elad Nachman > Subject: [EXT] Re: [PATCH v5 1/2] arm64: dts: marvell: Add Armada 98DX253= 0 > SoC and RD-AC5X board >=20 > External Email >=20 > ---------------------------------------------------------------------- > On Wed, May 11, 2022 at 10:59:37PM +0000, Chris Packham wrote: > > > > On 12/05/22 04:20, Andrew Lunn wrote: > > > On Wed, May 11, 2022 at 07:10:03PM +0300, Vadym Kochan wrote: > > >> Hi Chris, > > >> > > >>> arch/arm64/boot/dts/marvell/Makefile | 1 + > > >>> .../boot/dts/marvell/armada-98dx2530.dtsi | 310 > ++++++++++++++++++ > > >>> arch/arm64/boot/dts/marvell/rd-ac5x.dts | 90 +++++ > > >>> 3 files changed, 401 insertions(+) > > >> Marvell is going to start the upstreaming of AC5X boards support, > > That's good news. I'm probably the customer that's been nagging the > > Marvell support team. But I'm also impatient hence I started working > > on this series. The pinctrl and mvneta changes have already been accept= ed. > > >> we have also patches with similar .dts(i) files but with > > >> different naming: > > >> > > >> ac5.dtsi > > >> ac5_rd.dts > > >> ac5_db.dts > > >> ac5x_db.dts > > >> > > >> What do you think about to use these naming scheme ? > > > > Personally I thought they'd be rejected upstream as being too vague > > and generic. >=20 > Agreed. >=20 > > I'm not against changing if there is a consensus. On another thread > > the idea of armada-98dx25xx/armada-98dx35xx was mentioned. That > might > > be a reasonable compromise (although technically there's no difference > > in the CPU block between the 25xx and 35xx). >=20 > Until we find there is a difference. Marvell, can you confirm that the sw= itch > really is the only difference? Basically, the cpu-subsystems of Prestera 98DX25xx (AC5) and Prestera 98DX3= 5xx (AC5X) are the same. There is a very small difference in how the default memory map starts after= boot, which is reconfigurable in u-boot. This affects the switch (not part of the device tree anyway) and the PCIe. The PCIe window still overlap partially between AC5 and AC5X, however. The original Marvell DTSI overcomes this by defining only the PCIe overlapp= ing part in the device tree, resulting in a single device tree which works = on both AC5 and AC5X. The DTSI Chris proposed had the PCIe portion removed. We have PCIe support for AC5/AC5X so we would obviously like to include thi= s portion in both the DTSI and as a patch to the Armada8K PCIe driver. >=20 > This might also come down to ID registers. The DT could be enough to find > the ID of the device, the rest is then done in the drivers, not DT. >=20 > > > However, now that i come to look in arch/arm64/boot/dts/marvell, i > > > think most of the current filenames proposed don't match the current > names. > > > > > > armada-98dx2530.dtsi fits the current pattern. > > > > > > However, Chris's board files should probably be > > > > > > armada-98dx2530-rd.dts > > > > > > and the other files should be > > > > > > armada-98dx2530-db.dts > > > > > > armada-98dx2530-x-db.dts > > > > > > What does the x in x_db mean? Does that refer to the board or the SoC= ? > > > > The x is from AC5X so we'd actually have armada-98dx25xx-db.dts and > > armada-98dx35xx-db.dts. My board would be called > > armada-98dx35xx-rd.dts or perhaps armada-98dx3550-rd.dts. >=20 > armada-98dx25xx and armada-98dx35xx does help with the naming. So it > probably is worth having armada-98dx35xx which simply includes armada- > 98d25xx. >=20 > Andrew Elad.