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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v14-20020a17090690ce00b006e48d161aaasi493107ejw.213.2022.05.12.15.10.36; Thu, 12 May 2022 15:11:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=InDRJEQ7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354770AbiELOAE (ORCPT + 99 others); Thu, 12 May 2022 10:00:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354890AbiELN75 (ORCPT ); Thu, 12 May 2022 09:59:57 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43F621EA1B4; Thu, 12 May 2022 06:59:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1652363995; x=1683899995; h=message-id:date:mime-version:subject:to:references:from: in-reply-to:content-transfer-encoding; bh=8vo+iUkl8KwV3TsvAlzOYyffo163sCqaEuIUNOAtzw4=; b=InDRJEQ7KezWN097z0GnLpnyjLsoK8cTeGGx6GPtpg5oRdLF3fvSe4dW S0WjhME5i6Tqv0KrbAXGU8THaq6ta77yXg2CLpAWcC3WY0npM3gtGZHqe bIGPZMJNC29ixY1dXBqa7/hNsu53aIL00C9se7kIQ40fPYEEM3vt8ZktD 4=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 12 May 2022 06:59:54 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 06:59:54 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 12 May 2022 06:59:53 -0700 Received: from [10.216.61.159] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 12 May 2022 06:59:49 -0700 Message-ID: Date: Thu, 12 May 2022 19:29:43 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.3.2 Subject: Re: [PATCH] drm/msm/a6xx: Fix refcount leak in a6xx_gpu_init Content-Language: en-US To: Miaoqian Lin , Rob Clark , "Sean Paul" , Abhinav Kumar , "David Airlie" , Daniel Vetter , Dmitry Baryshkov , Jonathan Marek , "Jordan Crouse" , , , , References: <20220512121955.56937-1-linmq006@gmail.com> From: Akhil P Oommen In-Reply-To: <20220512121955.56937-1-linmq006@gmail.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/12/2022 5:49 PM, Miaoqian Lin wrote: > of_parse_phandle() returns a node pointer with refcount > incremented, we should use of_node_put() on it when not need anymore. > > a6xx_gmu_init() passes the node to of_find_device_by_node() > and of_dma_configure(), of_find_device_by_node() will takes its > reference, of_dma_configure() doesn't need the node after usage. > > Add missing of_node_put() to avoid refcount leak. > > Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support") > Signed-off-by: Miaoqian Lin > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index ccc4fcf7a630..a8f6d73197b1 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -1919,6 +1919,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) > BUG_ON(!node); > > ret = a6xx_gmu_init(a6xx_gpu, node); > + of_node_put(node); > if (ret) { > a6xx_destroy(&(a6xx_gpu->base.base)); > return ERR_PTR(ret); Reviewed-by: Akhil P Oommen -Akhil.