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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q9-20020a5d61c9000000b0020ad77f1a1fsi2203765wrv.264.2022.05.13.09.55.08; Fri, 13 May 2022 09:55:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=QVMrUbhl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357634AbiELSXy (ORCPT + 99 others); Thu, 12 May 2022 14:23:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60636 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357618AbiELSXv (ORCPT ); Thu, 12 May 2022 14:23:51 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2238B5E150; Thu, 12 May 2022 11:23:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1652379829; x=1683915829; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=D/M80DL4EVpMUX/iyBfSzlq1EWkD38j6PqSQXkpagAE=; b=QVMrUbhlFM9QeoqUR/TXimb7RoEz4MF2CaEq794CIWL1mJNlRgQMJK4O 3qv61ymkhbmF3lbJqLEoyruaolMUYbB3hFksX2YLIgifIwKGjGoGioWoF Ehs7ozCsn61Qq2oHNSJZG6euFuGkrW9PGHehQeST4PTzzmZvOQy3w71Qv U=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 12 May 2022 11:23:48 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 11:23:47 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 12 May 2022 11:23:46 -0700 Received: from hu-kriskura-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 12 May 2022 11:23:40 -0700 From: Krishna Kurapati To: Krzysztof Kozlowski , Rob Herring , Andy Gross , Bjorn Andersson , Greg Kroah-Hartman , Felipe Balbi , Stephen Boyd , Doug Anderson , "Matthias Kaehlcke" , Mathias Nyman CC: , , , , , , , , Sandeep Maheswaram , Krishna Kurapati Subject: [v16 2/5] usb: dwc3: core: Host wake up support from system suspend Date: Thu, 12 May 2022 23:53:19 +0530 Message-ID: <1652379802-8318-3-git-send-email-quic_kriskura@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1652379802-8318-1-git-send-email-quic_kriskura@quicinc.com> References: <1652379802-8318-1-git-send-email-quic_kriskura@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sandeep Maheswaram During suspend read the status of all port and set hs phy mode based on current speed. Use this hs phy mode to configure wakeup interrupts in qcom glue driver. Check wakeup-source property for dwc3 core node to set the wakeup capability. Drop the device_init_wakeup call from runtime suspend and resume. Also check during suspend if any wakeup capable devices are connected to the controller (directly or through hubs), if there are none set a flag to indicate that the PHY is powered down during suspend. Signed-off-by: Sandeep Maheswaram Signed-off-by: Krishna Kurapati --- drivers/usb/dwc3/core.c | 30 +++++++++++++++++------------- drivers/usb/dwc3/core.h | 4 ++++ drivers/usb/dwc3/host.c | 24 ++++++++++++++++++++++++ 3 files changed, 45 insertions(+), 13 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 01115df..8bcabc5 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1785,6 +1785,7 @@ static int dwc3_probe(struct platform_device *pdev) platform_set_drvdata(pdev, dwc); dwc3_cache_hwparams(dwc); + device_init_wakeup(&pdev->dev, of_property_read_bool(dev->of_node, "wakeup-source")); spin_lock_init(&dwc->lock); mutex_init(&dwc->mutex); @@ -1946,10 +1947,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) dwc3_core_exit(dwc); break; case DWC3_GCTL_PRTCAP_HOST: - if (!PMSG_IS_AUTO(msg)) { - dwc3_core_exit(dwc); - break; - } + dwc3_check_phy_speed_mode(dwc); /* Let controller to suspend HSPHY before PHY driver suspends */ if (dwc->dis_u2_susphy_quirk || @@ -1965,6 +1963,15 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) phy_pm_runtime_put_sync(dwc->usb2_generic_phy); phy_pm_runtime_put_sync(dwc->usb3_generic_phy); + + if (!PMSG_IS_AUTO(msg)) { + if (device_may_wakeup(dwc->dev)) + dwc->phy_power_off = false; + else { + dwc->phy_power_off = true; + dwc3_core_exit(dwc); + } + } break; case DWC3_GCTL_PRTCAP_OTG: /* do nothing during runtime_suspend */ @@ -2008,11 +2015,12 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) break; case DWC3_GCTL_PRTCAP_HOST: if (!PMSG_IS_AUTO(msg)) { - ret = dwc3_core_init_for_resume(dwc); - if (ret) - return ret; - dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); - break; + if (dwc->phy_power_off) { + ret = dwc3_core_init_for_resume(dwc); + if (ret) + return ret; + dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); + } } /* Restore GUSB2PHYCFG bits that were modified in suspend */ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); @@ -2084,8 +2092,6 @@ static int dwc3_runtime_suspend(struct device *dev) if (ret) return ret; - device_init_wakeup(dev, true); - return 0; } @@ -2094,8 +2100,6 @@ static int dwc3_runtime_resume(struct device *dev) struct dwc3 *dwc = dev_get_drvdata(dev); int ret; - device_init_wakeup(dev, false); - ret = dwc3_resume_common(dwc, PMSG_AUTO_RESUME); if (ret) return ret; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 81c486b..37397a8 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -1155,6 +1155,9 @@ struct dwc3 { bool phys_ready; + unsigned int hs_phy_mode; + bool phy_power_off; + struct ulpi *ulpi; bool ulpi_ready; @@ -1539,6 +1542,7 @@ int dwc3_core_soft_reset(struct dwc3 *dwc); #if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) int dwc3_host_init(struct dwc3 *dwc); void dwc3_host_exit(struct dwc3 *dwc); +void dwc3_check_phy_speed_mode(struct dwc3 *dwc); #else static inline int dwc3_host_init(struct dwc3 *dwc) { return 0; } diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c index f56c30c..e19b40a 100644 --- a/drivers/usb/dwc3/host.c +++ b/drivers/usb/dwc3/host.c @@ -12,6 +12,7 @@ #include #include "core.h" +#include "../host/xhci.h" static void dwc3_host_fill_xhci_irq_res(struct dwc3 *dwc, int irq, char *name) @@ -136,3 +137,26 @@ void dwc3_host_exit(struct dwc3 *dwc) { platform_device_unregister(dwc->xhci); } + +void dwc3_check_phy_speed_mode(struct dwc3 *dwc) +{ + int i, num_ports; + u32 reg; + struct usb_hcd *hcd = platform_get_drvdata(dwc->xhci); + struct xhci_hcd *xhci_hcd = hcd_to_xhci(hcd); + + dwc->hs_phy_mode = 0; + + reg = readl(&xhci_hcd->cap_regs->hcs_params1); + + num_ports = HCS_MAX_PORTS(reg); + for (i = 0; i < num_ports; i++) { + reg = readl(&xhci_hcd->op_regs->port_status_base + i * NUM_PORT_REGS); + if (reg & PORT_PE) { + if (DEV_HIGHSPEED(reg) || DEV_FULLSPEED(reg)) + dwc->hs_phy_mode |= PHY_MODE_USB_HOST_HS; + else if (DEV_LOWSPEED(reg)) + dwc->hs_phy_mode |= PHY_MODE_USB_HOST_LS; + } + } +} -- 2.7.4