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[2620:137:e000::1:20]) by mx.google.com with ESMTP id b13-20020a056402278d00b00418c2b5bd65si3682126ede.71.2022.05.13.15.56.26; Fri, 13 May 2022 15:56:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=lzvobPJp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352131AbiELMr2 (ORCPT + 99 others); Thu, 12 May 2022 08:47:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345760AbiELMr0 (ORCPT ); Thu, 12 May 2022 08:47:26 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1972939167; Thu, 12 May 2022 05:47:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=E7JXfgKDXyXBuDHtThgJmopN/mj/yocwISb9cNT//xM=; b=lzvobPJpPlp7weaceib4oOVQx9 qi0PA9B9wsGk1IHh9oBx6iTmD2+Rq9Qvn+c6MaFmzXtKY/cXhTfuyCuAUdDoZQRadRAnBfd/W0fsR Y2J+Flows69UiKNtrPTpSZ8Fza1jJaK/T2sB7sLeKrs5G8Fhh9qm6DDRyL8eOTwKHvGY=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1np8Di-002S27-1F; Thu, 12 May 2022 14:47:06 +0200 Date: Thu, 12 May 2022 14:47:06 +0200 From: Andrew Lunn To: Elad Nachman Cc: Chris Packham , Vadym Kochan , "catalin.marinas@arm.com" , "will@kernel.org" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "gregory.clement@bootlin.com" , "sebastian.hesselbarth@gmail.com" , Kostya Porotchkin , "robert.marko@sartura.hr" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: Re: [EXT] Re: [PATCH v5 1/2] arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board Message-ID: References: <20220504044624.951841-1-chris.packham@alliedtelesis.co.nz> <20220511161003.GE10145@plvision.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Basically, the cpu-subsystems of Prestera 98DX25xx (AC5) and Prestera 98DX35xx (AC5X) are the same. Great, thanks for the conformation. > The DTSI Chris proposed had the PCIe portion removed. > We have PCIe support for AC5/AC5X so we would obviously like to > include this portion in both the DTSI and as a patch to the Armada8K > PCIe driver. So you can add the needed node to the .dtsi as part of the patch to the pci-aardvark.c driver. That sounds O.K. Andrew