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Date:   Fri, 13 May 2022 09:38:49 +0200
From:   Maxime Ripard <maxime@cerno.tech>
To:     qianfanguijin@163.com
Cc:     linux-sunxi@lists.linux.dev, Rob Herring <robh+dt@kernel.org>,
        Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        "Rafael J . Wysocki" <rafael@kernel.org>,
        Viresh Kumar <viresh.kumar@linaro.org>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v3 2/2] ARM: dts: sun8i-r40: Add "cpu-supply" node for
 sun8i-r40 based board
Message-ID: <20220513073849.cu4jzykefat2sepg@houat>
References: <20220512071858.10805-1-qianfanguijin@163.com>
 <20220512071858.10805-2-qianfanguijin@163.com>
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Hi,

On Thu, May 12, 2022 at 03:18:58PM +0800, qianfanguijin@163.com wrote:
> From: qianfan Zhao <qianfanguijin@163.com>
>=20
> sun8i-r40 actived cpufreq feature now, let's add "cpu-supply" node on
> board.
>=20
> Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
> ---
>  arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4 ++++
>  arch/arm/boot/dts/sun8i-r40-feta40i.dtsi          | 4 ++++
>  arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts          | 4 ++++
>  arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 4 ++++
>  4 files changed, 16 insertions(+)
>=20
> diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm=
/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> index a6a1087a0c9b..4f30018ec4a2 100644
> --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
> @@ -113,6 +113,10 @@ &ahci {
>  	status =3D "okay";
>  };
> =20
> +&cpu0 {
> +	cpu-supply =3D <&reg_dcdc2>;
> +};
> +

This will break bisection on those boards. Indeed, you added the OPPs on
the first patch, and if you only apply that patch, the boards in the
second patch will be missing their CPU regulator. The kernel will then
ramp up the frequency to the highest OPP, but will not change the
voltage, resulting in a crash.

There's a similar issue for all the boards that don't have a regulator
in the first place.

The way we worked around this for the other SoCs is to have a DTSI with
the OPPs with a frequency higher than what U-Boot boots with (1008MHz?),
and only include that DTSI on boards that have a CPU regulator hooked in.

Maxime

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