Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp1030266iob; Fri, 13 May 2022 20:17:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz/RxWLpxuujEEP4bAqtnlOiwjQ2ZQF/SJde7pFFuMrPOltbbXMSln6FCObrhUZuM0ATFV2 X-Received: by 2002:a05:600c:3b0a:b0:394:6373:6c45 with SMTP id m10-20020a05600c3b0a00b0039463736c45mr17261821wms.69.1652498235020; Fri, 13 May 2022 20:17:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652498235; cv=none; d=google.com; s=arc-20160816; b=U+97iHIGezYnPeCi3PGEoLmvN5qJpUzXVI4S79aETlOVncQiaW+2wX9xwk2JHfmzR5 PHzosSZjcW5Sd9wNpwaNMBxunPkpHqccpZdoy0OdBYTmHGQaCMZ1y1PvTxudjjm0O6y6 +9RYX+X9r/1q5TrzdNH9OiYEMaTXtEuBgK87IpbhFa6qD9xnUDJGEcrdaEaGRVdSCSbQ wUtwAugzmccPWrgyQF/dQpNn84PjY8FjHaH/syuKWoiLEi7kv2yaECWuNJN5J+/q2DdE xpOVfHRkvHRIEGPU2VzeQU1y9QfF2gi7fSgVfU5A6hD519biohhF9U+EiSH8KKe2+BJm P93Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:organization:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=EfkQ4R0jWGr0MhsPayqSKTj4oYxbvVWa4tu8xA420UM=; b=I2wkYsybDytyPe+e3OW0j1D0s7mMjPk3b5yZn6ZVAJW4+r6o444MdSECsIq6m94vlX Z34lFMtnfovc0iBZRvnxpxnWso4Yjmivs3vzteSSUnt8XDcJIFoZP9bBGkICvPf4KdeE ILCp4JEISJZUy21+7r7xSPHhd9fwdGKw5vy890EFVtS1RL1tXV/QDSf5y9cxyg8gCku0 37F5bvISCc8NH9q4CGN4Yw92A+zBRdS4+iWoDEVBh6xXf/lbvdBVajbj/mCNnE3i0qo/ /YckIYe3q9U65LPGi3xvhqWAzEAzOopXQJC8qWlp+znhnuokWV7ER/7o0d9rNYN/IhPs 1U+g== ARC-Authentication-Results: i=1; mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [23.128.96.19]) by mx.google.com with ESMTPS id i15-20020a5d584f000000b0020c57ea2a2bsi3713877wrf.29.2022.05.13.20.17.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 May 2022 20:17:15 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 8155B3E5852; Fri, 13 May 2022 16:55:50 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356901AbiELRL5 (ORCPT + 99 others); Thu, 12 May 2022 13:11:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1356931AbiELRLB (ORCPT ); Thu, 12 May 2022 13:11:01 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F061327CD6; Thu, 12 May 2022 10:10:54 -0700 (PDT) X-IronPort-AV: E=McAfee;i="6400,9594,10345"; a="252120842" X-IronPort-AV: E=Sophos;i="5.91,220,1647327600"; d="scan'208";a="252120842" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 10:08:38 -0700 X-IronPort-AV: E=Sophos;i="5.91,220,1647327600"; d="scan'208";a="658684239" Received: from smile.fi.intel.com ([10.237.72.54]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 May 2022 10:08:32 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.95) (envelope-from ) id 1npCIe-00FHkY-Cq; Thu, 12 May 2022 20:08:28 +0300 Date: Thu, 12 May 2022 20:08:28 +0300 From: Andy Shevchenko To: Marc Zyngier Cc: linux-kernel@vger.kernel.org, Linus Walleij , Bartosz Golaszewski , Thierry Reding , Joey Gouly , Jonathan Hunter , Hector Martin , Sven Peter , Alyssa Rosenzweig , Bjorn Andersson , Andy Gross , Jeffrey Hugo , Thomas Gleixner , Basavaraj Natikar , Shyam Sundar S K , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, kernel-team@android.com Subject: Re: [PATCH v3 00/10] gpiolib: Handle immutable irq_chip structures Message-ID: References: <20220419141846.598305-1-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220419141846.598305-1-maz@kernel.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-Spam-Status: No, score=-0.6 required=5.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FORGED_GMAIL_RCVD,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,SPOOFED_FREEMAIL_NO_RDNS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Apr 19, 2022 at 03:18:36PM +0100, Marc Zyngier wrote: > This is a followup from [2]. > > I recently realised that the gpiolib play ugly tricks on the > unsuspecting irq_chip structures by patching the callbacks. > > Not only this breaks when an irq_chip structure is made const (which > really should be the default case), but it also forces this structure > to be copied at nauseam for each instance of the GPIO block, which is > a waste of memory. Is this brings us to the issue with IRQ chip name? The use case in my mind is the following: 1) we have two or more GPIO chips that supports IRQ; 2) the user registers two IRQs of the same (by number) pin on different chips; 3) cat /proc/interrupt will show 'my_gpio_chip XX', where XX is the number. So, do I understand correct current state of affairs? If so, we have to fix this to have any kind of ID added to the chip name that we can map /proc/interrupts output correctly. > My current approach is to add a new irq_chip flag (IRQCHIP_IMMUTABLE) > which does what it says on the tin: don't you dare writing to them. > Gpiolib is further updated not to install its own callbacks, and it > becomes the responsibility of the driver to call into the gpiolib when > required. This is similar to what we do for other subsystems such as > PCI-MSI. > > 5 drivers are updated to this new model: M1, QC, Tegra, pl061 and AMD > (as I actively use them) keeping a single irq_chip structure, marking > it const, and exposing the new flag. > > Nothing breaks, the volume of change is small, the memory usage goes > down and we have fewer callbacks that can be used as attack vectors. > What's not to love? > > Since there wasn't any objection in the previous round of review, I'm > going to take this series into -next to see if anything breaks at > scale. -- With Best Regards, Andy Shevchenko