Received: by 2002:a6b:500f:0:0:0:0:0 with SMTP id e15csp1031030iob; Fri, 13 May 2022 20:19:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy7Wz+8BBTz1nenvIV/95bn9E6tdq757tI5ODHr+U8Qp3n4K4uz5GkOohivSWtiZcW9Mids X-Received: by 2002:a5d:6582:0:b0:20a:d8f6:b1e8 with SMTP id q2-20020a5d6582000000b0020ad8f6b1e8mr6166664wru.431.1652498355830; Fri, 13 May 2022 20:19:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652498355; cv=none; d=google.com; s=arc-20160816; b=KpS576IbwKb/FXQpIfeqp/KsW6HWogvRZnGMHMYLEvrUCsEdeZg8IW+jfSCKXaeTP1 nc6et18pfZY2IXBbOcbVnS5GZ45Ci4PC4AvwVFgX+Z/bsekcHq7L9Im9uqKzn9pdZq+H 0xsBBRkzePJMCt6jSqCsBw/+EviiQ648WArzJH3qaTrm0ESSmR0zYVZfS8IVMvR+FUhJ T47J3yG9yOWqlRU+M/0bdu9SCzbaQGvKPREwhqoWIYkFW26mmDOXPfbIyySK4jQQfQcZ I2fQNM6UMcVtXpYkNv+Oa/M/H1UvrPIA3//6cLS7WCY4mYH6wUWB0CU3Vm9RIdSDnxio WH+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=UnE2ycv6Hhj9hLZHqo28vKivFO/fUMxrSZP74Hj1S74=; b=klBZ4hkYapgoueZWBq7mz9dA/PTXgi9VoJXT5m/Krd3y6z4gsodKn8b2sVQTW/uR0E 4khNrDh+BkrAm1CElVyDYBr1tLZWIqKq2P0v1gQvGJG4n+2VuJ6KtoZo5Lt7jssVwH3f dviY6ypzYiUeD8jzrsoVjVp7v6WZ6W/PTqON7qdC2O+p1A8hEAH3Yg3T4l+hJa+wkC4x rhFLfJWyFh8eRa+mxxjJtXyG3HTPTUr1rvozPl3w8GSyRCXbPmOTFvSXk5j2nfCmUUMi ctv0yWae1ByYxJ0uMQFtQvDDo5I1JtVnwYnodCchl48m3SMKHt4IMmp5JG4RvIci4JzT fHlQ== ARC-Authentication-Results: i=1; mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net. [23.128.96.19]) by mx.google.com with ESMTPS id b8-20020a05600018a800b0020cc43f0f99si5085297wri.1050.2022.05.13.20.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 May 2022 20:19:15 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) client-ip=23.128.96.19; Authentication-Results: mx.google.com; spf=softfail (google.com: domain of transitioning linux-kernel-owner@vger.kernel.org does not designate 23.128.96.19 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 29EDE3F108E; Fri, 13 May 2022 16:57:32 -0700 (PDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381872AbiEMPjs (ORCPT + 99 others); Fri, 13 May 2022 11:39:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1382158AbiEMPjp (ORCPT ); Fri, 13 May 2022 11:39:45 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1A85435DEE for ; Fri, 13 May 2022 08:39:34 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9CF5B113E; Fri, 13 May 2022 08:39:33 -0700 (PDT) Received: from lakrids (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CC80A3F73D; Fri, 13 May 2022 08:39:30 -0700 (PDT) Date: Fri, 13 May 2022 16:39:28 +0100 From: Mark Rutland To: Tong Tiangen Cc: James Morse , Andrew Morton , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Robin Murphy , Dave Hansen , Catalin Marinas , Will Deacon , Alexander Viro , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , x86@kernel.org, "H . Peter Anvin" , linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Kefeng Wang , Xie XiuQi , Guohanjun Subject: Re: [PATCH -next v4 6/7] arm64: add {get, put}_user to machine check safe Message-ID: References: <20220420030418.3189040-1-tongtiangen@huawei.com> <20220420030418.3189040-7-tongtiangen@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220420030418.3189040-7-tongtiangen@huawei.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RDNS_NONE, SPF_HELO_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 20, 2022 at 03:04:17AM +0000, Tong Tiangen wrote: > Add {get, put}_user() to machine check safe. > > If get/put fail due to hardware memory error, only the relevant processes > are affected, so killing the user process and isolate the user page with > hardware memory errors is a more reasonable choice than kernel panic. > > Add new extable type EX_TYPE_UACCESS_MC_ERR_ZERO which can be used for > uaccess that can be recovered from hardware memory errors. The difference > from EX_TYPE_UACCESS_MC is that this type also sets additional two target > register which save error code and value needs to be set zero. Why does this need to be in any way distinct from the existing EX_TYPE_UACCESS_ERR_ZERO ? Other than the case where we currently (ab)use that for copy_{to,from}_kernel_nofault(), where do we *not* want to use EX_TYPE_UACCESS_ERR_ZERO and *not* recover from a memory error? Thanks, Mark. > > Signed-off-by: Tong Tiangen > --- > arch/arm64/include/asm/asm-extable.h | 14 ++++++++++++++ > arch/arm64/include/asm/uaccess.h | 4 ++-- > arch/arm64/mm/extable.c | 4 ++++ > 3 files changed, 20 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/include/asm/asm-extable.h b/arch/arm64/include/asm/asm-extable.h > index 75b2c00e9523..80410899a9ad 100644 > --- a/arch/arm64/include/asm/asm-extable.h > +++ b/arch/arm64/include/asm/asm-extable.h > @@ -13,6 +13,7 @@ > > /* _MC indicates that can fixup from machine check errors */ > #define EX_TYPE_UACCESS_MC 5 > +#define EX_TYPE_UACCESS_MC_ERR_ZERO 6 > > #ifdef __ASSEMBLY__ > > @@ -78,6 +79,15 @@ > #define EX_DATA_REG(reg, gpr) \ > "((.L__gpr_num_" #gpr ") << " __stringify(EX_DATA_REG_##reg##_SHIFT) ")" > > +#define _ASM_EXTABLE_UACCESS_MC_ERR_ZERO(insn, fixup, err, zero) \ > + __DEFINE_ASM_GPR_NUMS \ > + __ASM_EXTABLE_RAW(#insn, #fixup, \ > + __stringify(EX_TYPE_UACCESS_MC_ERR_ZERO), \ > + "(" \ > + EX_DATA_REG(ERR, err) " | " \ > + EX_DATA_REG(ZERO, zero) \ > + ")") > + > #define _ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, zero) \ > __DEFINE_ASM_GPR_NUMS \ > __ASM_EXTABLE_RAW(#insn, #fixup, \ > @@ -90,6 +100,10 @@ > #define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err) \ > _ASM_EXTABLE_UACCESS_ERR_ZERO(insn, fixup, err, wzr) > > + > +#define _ASM_EXTABLE_UACCESS_MC_ERR(insn, fixup, err) \ > + _ASM_EXTABLE_UACCESS_MC_ERR_ZERO(insn, fixup, err, wzr) > + > #define EX_DATA_REG_DATA_SHIFT 0 > #define EX_DATA_REG_DATA GENMASK(4, 0) > #define EX_DATA_REG_ADDR_SHIFT 5 > diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h > index e8dce0cc5eaa..e41b47df48b0 100644 > --- a/arch/arm64/include/asm/uaccess.h > +++ b/arch/arm64/include/asm/uaccess.h > @@ -236,7 +236,7 @@ static inline void __user *__uaccess_mask_ptr(const void __user *ptr) > asm volatile( \ > "1: " load " " reg "1, [%2]\n" \ > "2:\n" \ > - _ASM_EXTABLE_UACCESS_ERR_ZERO(1b, 2b, %w0, %w1) \ > + _ASM_EXTABLE_UACCESS_MC_ERR_ZERO(1b, 2b, %w0, %w1) \ > : "+r" (err), "=&r" (x) \ > : "r" (addr)) > > @@ -325,7 +325,7 @@ do { \ > asm volatile( \ > "1: " store " " reg "1, [%2]\n" \ > "2:\n" \ > - _ASM_EXTABLE_UACCESS_ERR(1b, 2b, %w0) \ > + _ASM_EXTABLE_UACCESS_MC_ERR(1b, 2b, %w0) \ > : "+r" (err) \ > : "r" (x), "r" (addr)) > > diff --git a/arch/arm64/mm/extable.c b/arch/arm64/mm/extable.c > index 525876c3ebf4..1023ccdb2f89 100644 > --- a/arch/arm64/mm/extable.c > +++ b/arch/arm64/mm/extable.c > @@ -88,6 +88,7 @@ bool fixup_exception(struct pt_regs *regs) > case EX_TYPE_BPF: > return ex_handler_bpf(ex, regs); > case EX_TYPE_UACCESS_ERR_ZERO: > + case EX_TYPE_UACCESS_MC_ERR_ZERO: > return ex_handler_uaccess_err_zero(ex, regs); > case EX_TYPE_LOAD_UNALIGNED_ZEROPAD: > return ex_handler_load_unaligned_zeropad(ex, regs); > @@ -107,6 +108,9 @@ bool fixup_exception_mc(struct pt_regs *regs) > switch (ex->type) { > case EX_TYPE_UACCESS_MC: > return ex_handler_uaccess_type(ex, regs, FIXUP_TYPE_MC); > + case EX_TYPE_UACCESS_MC_ERR_ZERO: > + return ex_handler_uaccess_err_zero(ex, regs); > + > } > > return false; > -- > 2.25.1 >